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參數(shù)資料
| 型號： | T7502 |
| 元件分類： | Codec |
| 英文描述： | T7502 Dual PCM Codec with Filters |
| 中文描述： | T7502雙PCM編解碼器與濾波器 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 417K |
| 代理商： | T7502 |
2
Lucent Technologies Inc.
Data Sheet
February 1998
T7502 Dual PCM Codec with Filters
Functional Description
The T7502 has one frame sync (FS) input that determines transmit and receive data timing for both channels. The
width of the FS pulse determines the order of the two channels on the PCM buses. If FS is nominally one MCLK
period wide (see Figure 5), the data for channel 0 is first. If FS is nominally two or more MCLK periods wide (Figure
6), the data for channel 1 is first. During a single 125
μ
s frame, the frame sync input is supplied a single pulse.
The frequency of the master clock must be either 2.048 MHz or 4.096 MHz. Internal circuitry determines the
master clock frequency during the powerup reset interval.
Powerdown is achieved by removing the FS pulse for at least 500
removed. Both channels are powered down together. Powerdown is not guaranteed if MCLK is lost, unless the
device is already in the powerdown mode.
μ
s with MCLK active, after which MCLK may be
5-3787
Figure 2. Typical Analog Input Section
Pin Information
5-3788.a
Figure 3. Pin Diagram
VF
X
INn
TO
CODEC
FILTERS
2.4 V
GAIN =R
FN
R
IN
GS
Xn
R
IN
R
FN
–
+
R
IP
VF
X
IPn
VCM0
R
FP
T - 7502 - - - EL
VF
R
OP0
VF
R
ON0
GNDA0
VF
X
IN0
VF
X
IP0
GS
X
0
VCM0
FS
MCLK
GNDD
VF
R
ON1
GNDA1
VF
X
IN1
VF
X
IP1
GS
X
1
VCM1
D
R
D
X
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VF
R
OP1
V
DD
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| T75-02A | 制造商:The Cherry Corporation 功能描述: |
| T75-02A-2 | 制造商:The Cherry Corporation 功能描述: |
| T7503 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T7503 Dual PCM Codec with Filters |
| T75-03A | 制造商:The Cherry Corporation 功能描述: |
| T7504 | 制造商:AGERE 制造商全稱:AGERE 功能描述:T7504 and T75504 Quad PCM Codecs with Filters |
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