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參數(shù)資料
| 型號(hào)： | T7507 |
| 元件分類： | Codec |
| 英文描述： | T7507 Quad PCM Codec with Filters, Termination Impedance, and Hybrid Balance |
| 中文描述： | T7507四路PCM編解碼器與過濾器，終端阻抗，以及混合平衡 |
| 文件頁數(shù)： | 1/30頁 |
| 文件大?。?/td> | 558K |
| 代理商： | T7507 |
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Data Sheet
August 1999
T7507 Quad PCM Codec with Filters,
Termination Impedance, and Hybrid Balance
Features
I
5 V only
I
Low-power, latch-up-free CMOS technology:
— 37 mW/channel typical operating power
dissipation
— 1 mW/channel typical powerdown dissipation
I
Fixed master clock frequency: 2.048 MHz
I
On-chip sample and hold, autozero, and precision
voltage reference
I
Differential architecture for high noise immunity
and power supply rejection
I
PCM interface:
— Fixed 2.048 MHz data rate
— Delayed and nondelayed PCM modes
— Fully flexible time-slot assignment
— Transmit and receive aligned or offset
I
Transmit PCM data output enable
I
Serial control interface with controlling processor
I
Latched parallel control interface with SLIC and
switch
I
Meets or exceeds D3/D4 (as per Lucent PUB
43801) and ITU-T G.711—G.714 requirements
I
Operating temperature range: –40 °C to +85 °C
I
A-law companding
I
Hybrid balance and termination impedance:
— 200
in series with 680
|| 0.1 μF
(People’s Republic of China Z
T
)
— Matched with L8567 SLIC
I
Programmable receive gain (–3.5 dB or –7 dB),
fixed transmit gain (0 dB) when matched with
L8567 SLIC
I
44-pin PLCC
Description
The T7507 device is a single-chip, four-channel
A-law PCM codec with filters. This integrated circuit
provides analog-to-digital and digital-to-analog con-
version. It provides the transmit and receive filtering
necessary to interface a voice telephone circuit to a
time-division multiplexed system. This device is pack-
aged in a 44-pin PLCC.
This codec is intended for use with Lucent Technolo-
gies Microelectronics Group’s L8567 SLIC. When
used with that SLIC, the line tip/ring pair is termi-
nated in the network required for central office appli-
cations in the People’s Republic of China (PRC).
Proper hybrid balance and transmit and receive
gains are also obtained.
This device uses a serial data control scheme to
interface with the controlling processor. This device
has a latched parallel data control scheme to provide
control bits to, and receive status bits from, the SLIC
and switch. This interface is designed to be compati-
ble with the Lucent L8567 SLIC and L7583 solid-
state switch.
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| T8100A | H.100/H.110 Interface and Time-Slot Interchangers |
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