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參數(shù)資料
| 型號： | T8532 |
| 元件分類： | Codec |
| 英文描述： | T8502 and T8503 Dual PCM Codecs with Filters |
| 中文描述： | T8502和T8503雙的PCM編解碼器與濾波器 |
| 文件頁數(shù)： | 24/48頁 |
| 文件大小： | 999K |
| 代理商： | T8532 |
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24
Lucent Technologies Inc.
Preliminary Data Sheet
November 2000
Codec Chip Set
T8531/T8532 Multichannel Programmable
Electrical Characteristics
For all specifications: T
A
= –40
°
C to +85
°
C, V
DD
= 5 V
±
5%, unless otherwise noted. Typical values are for
T
A
= 25
°
C and V
DD
= 5 V. Input signal frequency is 1020 Hz, unless otherwise noted. DSP clock frequency is
49.152 MHz.
dc Characteristics
Table 8. Digital Interface
Table 9. Analog Interface
Parameter
Symbol
V
IL
V
IH
V
OL
V
OH
V
OHC
I
IL
I
IH
Test Conditions
TTL-compatible inputs
TTL-compatible inputs
I
L
= 10 mA
I
L
= –10 mA
I
L
= –320
μ
A
GND < V
IN
< V
IL
V
IH
< V
IN
< V
DD
Min
—
2.0
—
2.4
3.5
–10
—
Typ
—
—
—
—
—
—
—
Max
0.7
—
0.4
—
—
—
10
Unit
V
V
V
V
V
μ
A
μ
A
Input Voltage
Low
High
Low
High
Output Voltage
Input Current
Pins Without a
Pull-up or
Pull-down
Pins with a
Pull-up
Low
High
Low
High
I
IL
I
IH
GND < V
IN
< V
IL
V
IH
< V
IN
< V
DD
GND < V
IN
< V
IL
V
IH
< V
IN
< V
DD
UPDO, SDX –40
°
C to 0
°
C
UPDO, SDX 0
°
C to 85
°
C
–120
—
—
—
–2
10
μ
A
μ
A
Pins with a
Pull-down
Low
High
I
IL
I
IH
–10
2
—
—
—
120
μ
A
μ
A
Output Current in High-impedance
State
—
I
OZ
–30
–10
—
—
30
10
μ
A
μ
A
Parameter
Symbol
RVTX
RVRTX
Test Conditions
0.25 V < VTX < 4.75 V
2.3 V < VRTX < 2.5 V
Min
10
7
Typ
—
—
Max
—
—
Unit
M
k
Input Resistance
Input Resistance
(dependent on the setting
of the termination impedance)
Common-mode Reference Voltage
CMT Input Sink Current
Input Voltage Swing
Load Resistance at VRP and VRN
(differential)
Load Capacitance
Output Resistance
VVRTX
IVRTX
VVTX
RL
—
2.2
—
—
4.0
2.4
—
—
—
2.6
400
3.2
—
V
μ
A
Vp-p
k
2.3 V < VRTX < 2.5 V
—
—
CL
RO
CL from VRP or VRN to V
SSA
Digital input code corresponding to
0 dBm PCM code at 1.02 kHz
Digital pattern corresponding to idle
PCM code (
μ
-law)
Channel powered down
10
μ
A max dc load
RL = 100 k
differential maximum
receive gain
—
—
—
2
100
10
pF
Output Offset Voltage Between
VRP and VRN
Output Offset Voltage Between
VRP and VRN, Powerdown
Output Voltage Swing (differential)
VOS
–100
0
100
mV
VOSPD
–20
0
20
mV
VRSW
5.28
—
—
Vp-p
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