參數(shù)資料
型號(hào): TAS3004PFBRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: GREEN, PLASTIC, TQFP-48
文件頁(yè)數(shù): 58/84頁(yè)
文件大?。?/td> 671K
代理商: TAS3004PFBRG4
8–6
8.10 I2C Serial Port Timing Characteristics
MIN
MAX
UNIT
fscl
SCL clock frequency
0
100
kHz
tbuf
Bus free time between start and stop
4.7
s
tlow
Low period of SCL clock
4.7
s
thigh
High period of SCL clock
4.0
s
thdsta
Hold time repeated start
4.0
s
tsusta
Setup time repeated start
4.7
20
s
thddat
Data hold time (See Note 6)
0
s
tsudat
Data setup time
250
ns
tr
Rise time for SDA and SCL
1000
ns
tf
Fall time for SDA and SCL
300
ns
tsusto
Setup time for stop condition
4.0
s
Cb
Capacitive load for each bus line
400
pF
NOTE 6: A device must internally provide a hold time of at least 300 ns for the SDA signal to bridge the undefined region of the falling edge of
SCL.
SDA
PS
Valid
Change
of Data
Allowed
P
SCL
tBUF
tHD(STA)
tr
tHD(DAT)
tf
tHD(STA)
tsu(DAT)
tsu(STA)
tsu(STO)
Data
Line
Stable
NOTE: tlow is measured from the end of tf to the beginning of tr.
thigh is measured from the end of tr to the beginning of tf.
Figure 8–7. I2C Bus Timing
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