參數(shù)資料
型號: TAS3103IDCP
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PDSO38
封裝: PLASTIC, HTSSOP-38
文件頁數(shù): 22/148頁
文件大?。?/td> 1247K
代理商: TAS3103IDCP
43
4.4
TAS3100 Timing Characteristics
4.4.1
Master Clock Signals Over Recommended Operating Conditions (Unless Otherwise
Noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
f(XTALI)
Frequency, XTALI (1/tc(1))
2.8
20
MHz
f(MCLKI)
Frequency, MCLKI (1/tc(2))
2.8
25
MHz
tw(MCLKI)
Pulse duration, MCLKI high
See Note 6
HMCLKI 25
HMCLKI
HMCLKI + 25
ns
MCLKI jitter
±5
ns
f(MCLKO)
Frequency, MCLKO (1/tc(3))
2.8
25
MHz
tr(MCLKO)
Rise time, MCLKO
CL = 30 pF
9.5
ns
tf(MCLKO)
Fall time, MCLKO
CL = 30 pF
9.5
ns
tw(MCLKO)
Pulse duration, MCLKO high
See Note 9
HMCLKO
ns
MCLKI jitter
XTALI master clock source
80
ps
MCLKI jitter
MTALI master clock source
See Note 10
td(MIMO)
Delay time, MCLKI
rising edge to
MCKLO = MCLKI
See Note 7
17
ns
td(MIMO)
rising edge to
MCLKO rising edge
MCLKO < MCLKI
See Note 7 and Note 8
17
ns
NOTES:
6. HMCLKI = 1 / 2MCLKI
7. Only applies when MCLKI is selected as master source clock.
8. Also applies to MCLKO falling edge when MCLKO = MCLKI/2 or MCLKI/4
9. HMCLKO = 1 / 2MCLKO. MCLKO has the same duty cycle as MCLKI when MCLKO = MCLKI. When MCLKO = 0.5 MCLKI or 0.25
MCLKI, the duty cycle of MCLKO is typically 50%.
10. When MCLKO is derived from MCLKI, MCLKO jitter = MCLKI jitter
XTALI
MCLKO
MCLKI
tw(MCLKI)
tf(MCLKO)
tc(1)
tc(2)
tc(3)
tw(MCLKO)
tr(MCLKO)
td(MI-MO)
Figure 41. Master Clock Signals Timing Waveforms
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