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參數(shù)資料
| 型號(hào)： | TAS3202PAGR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | GREEN, PLASTIC, TQFP-64 |
| 文件頁(yè)數(shù)： | 17/66頁(yè) |
| 文件大?。?/td> | 817K |
| 代理商： | TAS3202PAGR |
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SLES208B – JUNE 2009 – REVISED MARCH 2011
www.ti.com
Table 6-2. Slave Addresses
BASE ADDRESS
CS0
R/W
SLAVE ADDRESS
0110 10
0
0x68
0110 10
0
1
0x69
0110 10
1
0
0x6A
0110 10
1
0x6B
Table 6-3. Master Addresses
BASE ADDRESS
CS0
R/W
MASTER ADDRESS
1010 00
0
0xA0
1010 00
0
1
0xA1
1010 00
1
0
0xA2
1010 00
1
0xA3
The following is an example use of the I2C master address to access an external EEPROM. The TAS3202
can address up to two EEPROMs depending on the state of CS0. Initially, the TAS3202 comes up in I2C
master mode. If it finds a memory such as the 24C512 EEPROM, it reads the headers and data as
previously described. In this I2C master mode, the TAS3202 addresses the EEPROMs as shown in
Table 6-4. EEPROM Address I2C TAS3202 Master Mode = 0×A1/A0
A0
MSB
CS0
R/W
(EEPROM)
1
0
1
0
1/0
Table 6-5. EEPROM Address I2C TAS3202 Master Mode = 0×A3/A2
A0
MSB
CS0
R/W
(EEPROM)
1
0
1
0
1
1/0
Random I2C Transactions
Supplying a subaddress for each subaddress transaction is referred to as random I2C addressing. For
random I2C read commands, the TAS3202 responds with data, a byte at a time, starting at the subaddress
assigned, as long as the master device continues to respond with acknowledges. If a given subaddress
does not use all 32 bits, the unused bits are read as logic 0. I2C write commands, however, are treated in
accordance with the data assignment for that address space. If a write command is received for a mixer
subaddress, for example, the TAS3202 expects to see five 32-bit words. If fewer than five data words
have been received when a stop command (or another start command) is received, the data received is
discarded.
24
Microprocessor Controller
Copyright 2009–2011, Texas Instruments Incorporated
Product Folder Link(s): TAS3202
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