TAS5508
8-Channel Digital Audio PWM Processor
SLES091D – FEBRUARY 2004 – REVISED JULY 2009
www.ti.com
Table 7-16. Channel 1–8 Input Mixer Register Format (continued)
I2C
TOTAL
REGISTER
DESCRIPTION OF CONTENTS
DEFAULT STATE
SUBADDRESS
BYTES
FIELDS
SDIN1-left (Ch1) A to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
A_to_ipmix[4]
u[31:28], A_4[27:24], A_4[23:16], A_4[15:8], A_4[7:0]
SDIN1-right (Ch2) B to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
B_to_ipmix[4]
u[31:28], B_4[27:24], B_4[23:16], B_4[15:8], B_4[7:0]
SDIN2-left (Ch3) C to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
C_to_ipmix[4]
u[31:28], C_4[27:24], C_4[23:16], C_4[15:8], C_4[7:0]
SDIN2-right (Ch4) D to input mixer 4 coefficient (default = 1)
0x00, 0x80, 0x00, 0x00
D_to_ipmix[4]
u[31:28], D_4[27:24], D_4[23:16], D_4[15:8], D_4[7:0]
0x44
32
SDIN3-left (Ch5) E to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
E_to_ipmix[4]
u[31:28], E_4[27:24], E_4[23:16], E_4[15:8], E_4[7:0]
SDIN3-right (Ch6) F to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
F_to_ipmix[4]
u[31:28], F_4[27:24], F_4[23:16], F_4[15:8], F_4[7:0]
SDIN4-left (Ch7) G to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
G_to_ipmix[4]
u[31:28], G_4[27:24], G_4[23:16], G_4[15:8], G_4[7:0]
SDIN4-right (Ch8) H to input mixer 4 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
H_to_ipmix[4]
u[31:28], H_4[27:24], H_4[23:16], H_4[15:8], H_4[7:0]
SDIN1-left (Ch1) A to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
A_to_ipmix[5]
u[31:28], A_5[27:24], A_5[23:16], A_5[15:8], A_5[7:0]
SDIN1-right (Ch2) B to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
B_to_ipmix[5]
u[31:28], B_5[27:24], B_5[23:16], B_5[15:8], B_5[7:0]
SDIN2-left (Ch3) C to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
C_to_ipmix[5]
u[31:28], C_5[27:24], C_5[23:16], C_5[15:8], C_5[7:0]
SDIN2-right (Ch4) D to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
D_to_ipmix[5]
u[31:28], D_5[27:24], D_5[23:16], D_5[15:8], D_5[7:0]
0x45
32
SDIN3-left (Ch5) E to input mixer 5 coefficient (default = 1)
0x00, 0x80, 0x00, 0x00
E_to_ipmix[5]
u[31:28], E_5[27:24], E_5[23:16], E_5[15:8], E_5[7:0]
SDIN3-right (Ch6) F to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
F_to_ipmix[5]
u[31:28], F_5[27:24], F_5[23:16], F_5[15:8], F_5[7:0]
SDIN4-left (Ch7) G to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
G_to_ipmix[5]
u[31:28], G_5[27:24], G_5[23:16], G_5[15:8], G_5[7:0]
SDIN4-right (Ch8) H to input mixer 5 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
H_to_ipmix[5]
u[31:28], H_5[27:24], H_5[23:16], H_5[15:8], H_5[7:0]
SDIN1-left (Ch1) A to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
A_to_ipmix[6]
u[31:28], A_6[27:24], A_6[23:16], A_6[15:8], A_6[7:0]
SDIN1-right (Ch2) B to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
B_to_ipmix[6]
u[31:28], B_6[27:24], B_6[23:16], B_6[15:8], B_6[7:0]
SDIN2-left (Ch3) C to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
C_to_ipmix[6]
u[31:28], C_6[27:24], C_6[23:16], C_6[15:8], C_6[7:0]
SDIN2-right (Ch4) D to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
D_to_ipmix[6]
u[31:28], D_6[27:24], D_6[23:16], D_6[15:8], D_6[7:0]
0x46
32
SDIN3-left (Ch5) E to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
E_to_ipmix[6]
u[31:28], E_6[27:24], E_6[23:16], E_6[15:8], E_6[7:0]
SDIN3-right (Ch6) F to input mixer 6 coefficient (default = 1)
0x00, 0x80, 0x00, 0x00
F_to_ipmix[6]
u[31:28], F_6[27:24], F_6[23:16], F_6[15:8], F_6[7:0]
SDIN4-left (Ch7) G to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
G_to_ipmix[6]
u[31:28], G_6[27:24], G_6[23:16], G_6[15:8], G_6[7:0]
SDIN4-right (Ch8) H to input mixer 6 coefficient (default = 0)
0x00, 0x00, 0x00, 0x00
H_to_ipmix[6]
u[31:28], H_6[27:24], H_6[23:16], H_6[15:8], H_6[7:0]
Serial-Control Interface Register Definitions
82