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參數資料
| 型號： | TC9325F |
| 廠商： | Toshiba Corporation |
| 英文描述： | Single-Chip DTS Microcontroller (DTS-20) |
| 中文描述： | 單芯片微丘（丘- 20） |
| 文件頁數： | 39/101頁 |
| 文件大?。?/td> | 1802K |
| 代理商： | TC9325F |
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TC9325F
2002-05-14
39
External Interrupt and Timer-Counter Functions
Two types of external interrupts are supported using the INTR1 and INTR2 pins. The rising or falling
edges of the signals to these pins are used to issue the interrupt requests.
The timer-counter is an 8-bit binary counter with timer and external clock timer functions. The external
clock timer function input pins can also be used as external interrupt pins (INTR1, INTR2).
. External Interrupt Function
The external interrupts have two input pins: INTR1 and INTR2. Interrupt requests are issued by
detecting the rising and falling edges of these pins. The inputs (INTR1 and INTR2) have a Schmitt trigger
circuit and noise canceller. When using the CPU operating clock for the noise suppression clock, use a 900
kHz frequency; when using a 75 kHz clock, use a 75 kHz frequency. Pulses that fall below these frequencies
are rejected as noise. The input edge can be selected between a rising/falling edge for each pin. The IE bit
enables 8-bit timer-counter operations/interrupts and external interrupt requests. This bit is normally set
to 1. This bit is controlled by the OUT1 instruction with the operand [CN
=
0H] on I/O map page 2.
When an INTR1 pin interrupt is accepted, the program branches to address 0001H. When an INTR2 pin
interrupt is accepted, the program branches to 0002H.
The INTR1 and INTR2 pins can also be used as input ports. When set to input ports, the input state can
be read to data memory by the IN2 instruction with the operand [CN
=
8H].
Note: When the edge is switched by the POL bit, an interrupt request may be issued. Accordingly, when
switching the edge, first disable interrupts. To return to normal operation, reset the interrupt latch.
Y1
Y2
Y4
Y8
φ
L10P2
POL1 POL2
IE
*
INTR1 INTR2
Edge selection
8-bit timer and external interrupt operation enable
control
0: Disable
1: Enable
Normally, set this bit to 1.
1: Rising edge
0: Falling edge
Rejects pulses less than 1.11
μ
s at 4.5 MHz or 13.3
μ
s at 75 kHz.
Pulses over 3.33
μ
s at 4.5 MHz or 40
μ
s at 75 kHz are regarded as a signal.
Note: Edge selection also controls the timer-counter external clock edge. Input to the
timer-counter does not use the noise canceller function. Care is needed because even
when an external interrupt does not occur, clock pulses less than those above are input
to the counter.
Timer-counter edge selection
1: Count on rising edge
0: Count on falling edge
0: Input L level
1: Input H level
Y1
Y2
Y4
Y8
φ
K28
INTR1 INTR2
Pin input states
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