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參數(shù)資料
| 型號： | TDA6500TT/C4,118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 調(diào)諧器 |
| 英文描述： | 3-BAND, VIDEO TUNER, PDSO32 |
| 封裝： | 6.10 MM, 0.65 MM PITCH, PLASTIC, MO-153, SOT487-1, TSSOP-32 |
| 文件頁數(shù)： | 35/37頁 |
| 文件大?。?/td> | 223K |
| 代理商： | TDA6500TT/C4,118 |
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9397 750 15057
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 14 June 2005
7 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
pulse, the control register is loaded with data from byte CB after the 8th SCL clock pulse,
the band switch register is loaded with data of byte BB after the 8th SCL clock pulse and
the auxiliary register is loaded with data of byte AB after the 8th SCL clock pulse.
To program the AGC take-over point setting and the AGC current to a different value than
the default value, an additional byte, the auxiliary byte, has to be sent. To this end, the
auxiliary byte is preceded by a control byte with the test bits T2, T1 and T0 set to logic 011
(see Table 8).
[1]
Auxiliary byte AB replaces band switch byte BB when bit T2 = 0, T1 = 1 and T0 = 1.
Table 5:
I2C-bus data format for write mode
Name
Byte
Bit
Ack
MSB
LSB
Address byte
ADB
11000MA1
MA0
R/W=0 A
Divider byte 1
DB1
0
N14
N13
N12
N11
N10
N9
N8
A
Divider byte 2
DB2
N7
N6
N5
N4
N3
N2
N1
N0
A
Control byte
CB
1
CP
T2
T1
T0
RSA
RSB
OS
A
Band switch byte BB
0
P6
0
P4
P3
P2
P1
P0
A
Auxiliary byte [1]
AB
ATC
AL2
AL1
AL0
0000
A
Table 6:
Description of bits shown in Table 5
Symbol
Description
A
acknowledge
MA1 and MA0
programmable address bits; see Table 7
R/W
logic 0 for write mode
N14 to N0
programmable divider bits;
N = (N14
× 214) + (N13 × 213) + ... + (N1 × 21)+N0
CP
charge pump current
CP = 0: the charge pump current is 60
A
CP = 1: the charge pump current is 280
A (default)
T2, T1 and T0
test bits; see Table 8
RSA and RSB
reference divider ratio select bits; see Table 9
OS
tuning amplier control bit
OS = 0: normal operation; tuning voltage is on
OS = 1: tuning voltage is off; high-impedance state (default)
P6 and P4
NPN port control bits
Pn = 0: port n is off; high-impedance state (default)
Pn = 1: buffer n is on; VO =VCE(sat)
P3 to P0
PMOS port control bits
Pn = 0: port n is off; high-impedance state (default)
Pn = 1: buffer n is on; VO =VCC VDS(sat)
ATC
AGC time constant
ATC = 0: IAGC = 220 nA; t = 2 s with C = 160 nF (default)
ATC = 1: IAGC =9 A; t = 50 ms with C = 160 nF
AL2, AL1 and AL0
AGC take-over point bits; see Table 10
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