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參數(shù)資料
| 型號(hào)： | TDA7580 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | FM/AM DIGITAL IF SAMPLING PROCESSOR |
| 中文描述： | 調(diào)頻/調(diào)幅數(shù)字IF采樣處理器 |
| 文件頁數(shù)： | 25/31頁 |
| 文件大?。?/td> | 450K |
| 代理商： | TDA7580 |
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TDA7580
IF BAND PASS SIGMA DELTA ANALOGUE TO DIGITAL CONVERTER (IFADC)
The IFADC is a Band Pass Sigma Delta A to D converter with sampling rate of 37.05MHz (nominal) and notch
frequency of 10.7MHz. The structure is a second order switched capacitor multi bit modulator with self calibra-
tion algorithm to adjust the notch frequency.
The differential ended input allows 4.0Vpp voltage dynamic range, and reduces the inferred noise back to the
previous stage (tuner), and in turn gives high rejection to common mode noises.
The high linearity (very high IMD) is needed to fulfill good response of the channel equalization algorithm.
Low thermal and 1/f noise assures high dynamic range.
DIGITAL DOWN CONVERTER (DDC)
The DDC module allows to evaluate the in-phase and quadrature components of the incoming digital IF signal.
The I and Q computation is performed by the DDC block, which at the same time shifts down to 0-IF frequency
the incoming digital signal.
After the down conversion the rate is still very high (at the 37.05MHz rate); a SincK filter samples data down by
a factor of 32, decreasing it to 1.1578MHz. An additional decimation is performed by the subsequent FIR filters,
thus lowering the data rate at the final 289.45kHz, being the MPX data rate.
RDS
The RDS block is an hardware cell able to process RDS/RBDS signal, intended for recovering the inaudible
RDS/RBDS information which are transmitted by most of FM radio broadcasting stations.
It comprises of the following:
I
Demodulation of the European Radio Data System (RDS)
I
Demodulation of the US Radio Broadcast Data System (RDBS)
I
Automatic Group and Block synchronisation with flywheel mechanism
I
Error Detection and Correction
I
RAM buffer with a storage capacity of 24 RDS blocks and related status information
I
I
2
C and SPI interface, with pins shared with the DSP I
2
C/SPI
After filtering the oversampled MPX signal, the RDS/RDBS demodulator extracts the RDS Data Clock, RDS
Data signal and the Quality information.
The following RDS/RBDS decoder synchronizes the bitwise RDS stream to a group and block wise information.
This processing also includes error detection and error correction algorithms.
In addition, an automatic flywheel control avoids exhausting data exchange between RDS/RDBS processor and
the host.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TDA7580_07 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:FM/AM digital IF sampling processor |
| TDA758013TR | 功能描述:處理器 - 專門應(yīng)用 FM/AM Digital IF Sample Prcr RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| TDA7590 | 制造商:STMicroelectronics 功能描述: |
| TDA7590_09 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Digital signal processing IC for speech and audio applications |
| TDA7701 | 制造商:STMicroelectronics 功能描述:BATTERY-OPERATED FULLY INTEGRATED FM TUNER - Trays |
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