參數(shù)資料
型號: TDA8260
廠商: NXP Semiconductors N.V.
英文描述: Satellite Zero-IF QPSK/8PSK downconverter with PLL synthesizer
中文描述: 衛(wèi)星零中頻QPSK/8PSK與PLL合成器變頻器
文件頁數(shù): 7/23頁
文件大?。?/td> 143K
代理商: TDA8260
2004 Sep 03
7
Philips Semiconductors
Product specification
Satellite Zero-IF QPSK/8PSK
downconverter with PLL synthesizer
TDA8260TW
PROGRAMMING
The programming of the TDA8260TW is performed
through the I
2
C-bus. The read/write selection is made
through the R/W bit (address LSB). The TDA8260TW
fulfils the I
2
C-bus fast mode, according to the Philips
I
2
C-bus specification, see document “9398 393 40011”
I
2
C-bus voltage
The I
2
C-bus lines SCL and SDA can be connected to an
I
2
C-bus system tied either to 2.5, 3.3 or 5.0 V, that will
allow direct connection to most existing microcontrollers.
The choice of the threshold voltage for the I
2
C-bus lines is
made with pin BVS that needs to be left open-circuit,
connected to supply voltage or connected to ground;
see Table 1.
Table 1
I
2
C-bus voltage selection
I
2
C-bus write mode
I
2
C-bus write mode: R/W = logic 0; see Table 2.
After transmission of the address (first byte), four data
bytes can be sent to fully program the TDA8260TW. The
transmission sequence is one address byte followed by
four data bytes PD1, PD2, CD1 and CD2.
The I
2
C-bus transceiver has an auto-increment facility that
permits the TDA8260TW to be programmed within a
single transmission.
The TDA8260TWcanbepartlyprogrammedprovidedthat
the first data byte following the address is PD1 or CD1.
The first bit of the first data byte transmitted indicates
whether PD1 (first bit = logic 0) or CD1 (first bit = logic 1)
will follow.
Additional data bytes can be entered without the need to
re-address the device until an I
2
C-bus STOP condition is
sent by the controller. Each byte is loaded after the
corresponding 8th clock pulse.
Programmable divider data (contents of PD1 and PD2)
become valid only after the 8th clock pulse of PD2, or after
a STOP condition if only PD1 needs to be programmed.
PIN BVS
I
2
C-BUS VOLTAGE
(V)
GND
Open-circuit
V
CC
2.5
3.3
5
Table 2
I
2
C-bus write data format
Notes
1.
2.
3.
MSB is transmitted first.
X = undefined.
Acknowledge bit (A).
BYTE
(MSB)
(1)
BITS
(2)
(LSB)
ACK
(3)
Programmable address
Programmable divider (PD1)
Programmable divider (PD2)
Control data (CD1)
Control data (CD2)
1
0
1
0
0
0
MA1
N10
N2
R1
X
MA0
N9
N1
R0
X
0
A
A
A
A
A
N14
N6
T2
C0
N13
N5
T1
X
N12
N4
T0
X
N11
N3
R2
X
N8
N0
X
X
N7
1
C1
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