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參數(shù)資料
| 型號(hào)： | TEA2028-TEA2029 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | APPLICATION NOTE |
| 中文描述： | 應(yīng)用筆記 |
| 文件頁數(shù)： | 21/47頁 |
| 文件大小： | 532K |
| 代理商： | TEA2028-TEA2029 |
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V.5.2.2- Low-pass filter f(p)
The horizontalphase-shift adjustmentis takeninto
account: see Figure39
- FilterV = f(i) transfer characteristicis given as :
V = Zi +Z
R
K
V
CC
- Z
I
IN
Where :
Z = R
IN
// R//
C
p
R
IN
, I
IN
: modulator input characteristics
1
16
R
IN
I
IN
Phase Modulator
V
V
CC
+
C
P
KV
CC
Horizontal
Phase
Adjust
R
i
2
Comparator
2
Figure39
In Dynamic Mode
- V = Zi
f(p) =V
i= Z(p) =
R
′
1
+ τ
p
Where:
R’= R
IN
// R (R >> PotentiometerP)
τ
= R’ . C : Filter time constant
The networkbehavesasafirst orderlow-pass filter
whose cut-off frequencyat -3dBis : f
-3dB
=
1
2
π
R
′
C
Filter component values
- R = 470k
and C = 22nF
In practice, (K
∈
[0,1])V
CC
= 12V
- R
IN
= 25M
, I
IN
= 0.65
μ
A(base input current)
F
3db
= 15.7Hz with adjustmentand0.3Hz with-
out adjustment
V.5.2.3 - Phasemodulator
This is built around a comparator which converts
the filter voltage to a rectangular waveform such
that its rising edgephase, variable as afunction of
filter voltage ”V”, will trigger theline transistor turn-
off controlcircuitry.
The conversiongain is determined by the slope of
the line saw-toothappliedto comparator.
16
t’
OUT
V’
OUT
V
V
13
(t)
2
Figure 40
V
13
(t)
t
1
= f(v)
t
2
V’
OUT
V
2
t
D
t’
OUT
t
OUT
= 0
t
IN
3.5V
0
Line Output
Signal (Pin 10)
Line Flyback
(LF)
V
t
IN(
2)
T
H
T
10
= constant
2
Figure 41
Transfer characteristic is given by :
t
′
OUT
V
Let’s consider the delay interval between ”t
OUT
”
and the referencetime ”t
IN
”
where t
OUT
is the middle of line flyback :
t
OUT
- t
IN
= t
2
+ t
d
+ t
1
- t
H
Where :
- t1 = 4.3
μ
s
ResetforV
13
andV
φ2
aresignalscomingfromline
logicblock and are synchronizedon line sync
- t
d
= 2 to 15
μ
s
Delay between leading edge of output signal -
Pin 10 - and the middle of line flyback
- t
H
= 64
μ
s
- t
OUT
- t
IN
= B.V + t
d
- 59.7
μ
s
=
t
13
V
13
= B = 16.4
μ
s/V thereforet
2
= B.V
V.5.2.4-Lineflip-flop
(TEA2028onlyforTEA2029
refer to Section VII.6)
It generatesa constantdurationrectangularsignal
used to turn-offthe line transistor. Itis triggeredby
the rising-edge of the phase comparator output
voltage and reset after capacitor on pin 1 is
charged.
TEA2028 - TEA2029 APPLICATIONNOTE
21/46
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