參數(shù)資料
型號(hào)： TH58NVG1S3AFT
廠商： Toshiba Corporation
英文描述： TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
中文描述： 東芝馬鞍山數(shù)字集成電路硅柵CMOS
文件頁(yè)數(shù)： 31/32頁(yè)
文件大小： 368K
代理商： TH58NVG1S3AFT
2003-05-19A
31/32
TH58NVG1S3AFT05
(14) Failure phenomena for Program and Erase operations
The device may fail during a Program or Erase operation.
The following possible failure modes should be considered when implementing a highly reliable system.
FAILURE MODE
DETECTION AND COUNTERMEASURE SEQUENIE
Block
Erase Failure
Status Read after Erase
o
Block Replacement
Page
Programming Failure
Status Read after Program
o
Block Replacement
(1) Block Verify after Program
o
Retry
Single Bit
Programming Failure
“ 1 to 0 “
(2) ECC
x
ECC : Error Correction Code .
x
Block Replacement
Program
Erase
When an error occurs in an Erase operation, prevent future accesses to this bad block
(again by creating a table within the system or by using another appropriate scheme).
(15) Do not turn off the power before write/erase operation is complete. Avoid using the device when the battery
is low. Power shortage and/or power failure before write/erase operation is complete will cause loss of data and/or
damage to data.
When an error happens in Block A, try to
reprogram the data into another Block (Block
B) by loading from an external buffer. Then,
prevent further system accesses to Block A ( by
creating a bad block table or by using another
appropriate scheme).
Block A
Block B
Error occurs
Buffer
memory
Figure 28.
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