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參數(shù)資料
| 型號： | THS4500EVM |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | THS4500 Evalutation Module(THS4500評估板) |
| 中文描述： | THS4500 Evalutation模塊（THS4500評估板） |
| 文件頁數(shù)： | 12/25頁 |
| 文件大?。?/td> | 313K |
| 代理商： | THS4500EVM |
EVM Default Configuration
1-3
Introduction and Description
1.4
EVM Default Configuration
As delivered, the EVM has a fully functional example circuit, just add power
supplies, a signal source, and monitoring instrument. See Figure 1
–
1 for the
default schematic diagram. The user can change the gain by changing the
ratios of the feedback and gain resistors (see the device data sheet for
recommended resistor values). Chapter 5 has a complete EVM schematic
diagram showing all component locations.
The default configuration assumes a 50-
signal source, and contains
termination a termination resistor R1 for the source.
Some components such as C8, C9, C11, C12, TP1, TP2, R10, T1, and J4 are
omitted on the application schematics of Chapter 3 for clarity.
Figure 1
–
1.Schematic of the Populated Circuit on the EVM (Default Configuration)
+VS
C1 0
J7
GND
J4
Vout
J2
Vout+
TP4
J8
+VS
TP5
C12
0.1 F
+
C8
6.8 F
+VS
R3
402
R9
340
R1
56.2
C9
0.1 F
T1
ADP4 – 1WT
6
1
5
4
3
C2 0
R17
0
–VS
TP3
R6 0
C13
1 F
TP1
Vocm
J1
Vin–
R4
392
R2
374
R10
280
R5
392
R8
340
R7 0
TP2
PD–
J3
Vout–
J6
Vin+
J5
–VC
–VS
+
C11
6.8 F
–
Vocm
+
PD
U1
THS4500
1
2
8
3
6
5
4
7
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