- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98227 > THS5641AIPWR (TEXAS INSTRUMENTS INC) PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 PDF資料下載
參數(shù)資料
| 型號： | THS5641AIPWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 |
| 封裝： | GREEN, PLASTIC, TSSOP-28 |
| 文件頁數(shù)： | 11/31頁 |
| 文件大小： | 915K |
| 代理商： | THS5641AIPWR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁
THS5641A
8BIT, 100 MSPS, CommsDAC
DIGITALTOANALOG CONVERTER
SLAS277A MARCH 2000 REVISED SEPTEMBER 2002
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
sleep mode
The THS5641A features a power-down mode that turns off the output current and reduces the supply current
to less than 5 mA over the analog supply range of 3 V to 5.5 V and temperature range. The power-down mode
is activated by applying a logic level 1 to the SLEEP pin (e.g., by connecting pin SLEEP to AVDD). An internal
pulldown circuit at node SLEEP ensures that the THS5641A is enabled if the input is left disconnected.
Power-up and power-down activation times depend on the value of external capacitor at node SLEEP. For a
nominal capacitor value of 0.1
F power down takes less than 5 s, and approximately 3 ms to power backup.
The SLEEP mode should not be used when an external control amplifier is used, as shown in Figure 25.
definitions of specifications and terminology
integral nonlinearity (INL)
The relative accuracy or integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum
deviation of the output from the line between zero and full scale excluding the effects of zero code and full-scale
errors.
differential nonlinearity (DNL)
The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the
measured and ideal 1 LSB amplitude change of any two adjacent codes. Monotonic means the output voltage
changes in the same direction (or remains constant) as a change in the digital input code.
offset error
Offset error is defined as the deviation of the output current from the ideal of zero at a digital input value of 0.
gain error
Gain error is the error in slope of the DAC transfer function.
signal-to-noise and distortion ratio (S/N+D or SINAD)
S/N+D or SINAD is the ratio of the rms value of the output signal to the rms sum of all other spectral components
below the Nyquist frequency, including harmonics but excluding dc. The value for S/N+D is expressed in
decibels.
spurious free dynamic range (SFDR)
SFDR is the difference between the rms value of the output signal and the rms value of the largest spurious
signal within a specified bandwidth. The value for SFDR is expressed in decibels.
total harmonic distortion (THD)
THD is the ratio of the rms sum of the first six harmonic components to the rms value of the fundamental signal
and is expressed in decibels.
output compliance range
The maximum and minimum allowable voltage of the output of the DAC, beyond which either saturation of the
output stage or breakdown may occur.
settling time
The time required for the output to settle within a specified error band.
glitch energy
The time integral of the analog value of the glitch transient.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| THS5641AIDWRG4 | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 |
| THS5641AIDWG4 | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 |
| THS5641AIPWRG4 | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 |
| THS5641AIDWR | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 |
| THS5641IDWR | PARALLEL, 8 BITS INPUT LOADING, 0.035 us SETTLING TIME, 8-BIT DAC, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| THS5641AIPWRG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC 8-Bit 100 MSPS CommsDAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| THS5641APW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT, 100 MSPS, CommsDACE DIGITAL-TO-ANALOG CONVERTER |
| THS5641DW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT, 100 MSPS, CommsDACE DIGITAL-TO-ANALOG CONVERTER |
| THS5641EVM | 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開發(fā)工具 THS5641 Eval Mod RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| THS5641IDW | 功能描述:IC 8-BIT 100MSPS D/A 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:CommsDAC™ 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:3,000 系列:nanoDAC™ 設(shè)置時間:80µs 位數(shù):18 數(shù)據(jù)接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 轉(zhuǎn)換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 供應(yīng)商設(shè)備封裝:SOT-23-8 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極 采樣率（每秒）:- 產(chǎn)品目錄頁面:784 (CN2011-ZH PDF) 配用:EVAL-AD5680EBZ-ND - BOARD EVAL FOR AD5680 其它名稱:AD5680BRJZ-2REEL7TR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。