參數(shù)資料
型號(hào): THS8133ATQFP
廠商: Texas Instruments, Inc.
英文描述: TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION
中文描述: 三路10位,80 MSPS的視頻D /與Tri轉(zhuǎn)爐電平同步發(fā)電
文件頁(yè)數(shù): 7/23頁(yè)
文件大?。?/td> 339K
代理商: THS8133ATQFP
THS8133, THS8133A, THS8133B
TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER
WITH TRI-LEVEL SYNC GENERATION
SLVS204C – APRIL 1999 – REVISED SEPTEMBER 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
programming example (continued)
First registered sample on GYr[9–0] after L-
>
H
on BLANK is interpreted as Pb[9–0]
T0
T1
T2
T3
T4
T5
T6
T7
T8
Pb(0)
Y(0)
Pr(0)
Y(2)
Pb(4)
Y(4)
Pr(4)
Y(6)
Pb(8)
RPr[9–0]
ARPr, AGY,
ABPb output
corresponding
to Pr(0),
Y(0), Pb(0)
data path latency = 9 CLK cycles
Pb(0)
registered
T9
Y(8)
GY[9–0]
BPb[9–0]
BLANK
Y(0)
registered
Pr(8)
T10
Pr(0)
registered
Figure 5. Input Format and Latency YPbPr 4:2:2 1
×
10 Bit Mode
sync generation
Additional control inputs SYNC and SYNC_T enable the superposition of an additional current onto the AGY
channel or on all three channels, depending on the setting of INS3_INT. By combining the SYNC and SYNC_T
control inputs, either bi-level negative going pulses or tri-level pulses can be generated. Depending on the timing
controls for these signals, both horizontal and vertical sync signals can be generated. Assertion of SYNC (active
low) will identify the sync period, while assertion of SYNC_T (active high) within this period will identify the
positive excursion of a tri-level sync.
Refer to the application information section for practical examples on the use of these control inputs for sync
generation.
blanking generation
An additional control input BLANK is provided that will fix the output amplitude on all channels to the blanking
level, irrespective of the value on the data input ports. However, sync generation has precedence over blanking;
that is, if SYNC is low, the level of BLANK is don’t care The absolute amplitude of the blanking level with respect
to active video is determined by the GBR or YPbPr operation mode of the device. Refer to the application
information section for practical examples on the use of this control input for blank generation.
Figure 6 shows how to control SYNC, SYNC_T, and BLANK signals to generate tri-level sync levels and blanking
at the DAC output. A bi-level (negative) sync is generated similarly by avoiding the positive transition on
SYNC_T during SYNC low.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
THS8133B 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION
THS8133BCPGP 制造商:Texas Instruments 功能描述:
THS8133BCPHP 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 10B 80 MSPS Triple Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類(lèi)型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類(lèi)型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray
THS8133BCPHPG4 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:TRIPLE 10-BIT, 80 MSPS VIDEO D/A CONVERTER WITH TRI-LEVEL SYNC GENERATION WITH TRI-LEVEL SYNC GENERATION
THS8133BEVM 制造商:Texas Instruments 功能描述:THS8133B TRIPLE 10BIT 80MSPS VID DAC EVM - Bulk