參數(shù)資料
型號(hào)： THS8135PHPG4
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： PARALLEL, WORD INPUT LOADING, 0.015 us SETTLING TIME, 10-BIT DAC, PQFP48
封裝： GREEN, PLASTIC, HTQFP-48
文件頁(yè)數(shù)： 21/25頁(yè)
文件大?。?/td> 522K
代理商： THS8135PHPG4
THS8135
TRIPLE 10BIT, 240 MSPS VIDEO DAC WITH TRILEVEL SYNC AND VIDEO
(ITUR.BT601)COMPLIANT FULL SCALE RANGE
SLAS343A MAY 2001 REVISED JUNE 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
SYNC_T
25
I
Sync tri-level control, active high. A rising edge on CLK latches SYNC_T. When asserted (high), a positive
sync (higher than blanking level) is generated when SYNC is low. When disabled (low), a negative sync (lower
than blanking level) is generated when SYNC is low. When generating a tri-level (negative-to-positive) sync,
an L->H transition on this signal positions the start of the positive transition. See Figure 10 for timing control.
SYNC_T is also used to put the device in generic DAC mode: SYNC=H AND SYNC_T = H -> generic DAC
mode. Therefore, the user should always drive SYNC_T low outside the sync period when video DAC mode
operation is intended.
VREF
37
O
Voltage reference for DACs. An internal voltage reference of nominally 1.2 V is provided, which requires an
external 0.1-
F ceramic capacitor between VREF and AVSS.
detailed description
The THS8135 is a fast well-matched triple DAC with current outputs optimized for video applications without
sacrificing its usefulness as a general-purpose triple DAC, thanks to a generic DAC mode. For video
applications, the device can embed an analog output (composite) bi-level or tri-level sync on only the
green/luma channel or on all three DAC output channels. The THS8135 offers compatibility with several popular
video data formats and provides standard analog output compliance levels for component video digitized
according to the ITU-R.BT601 sampling standard. The DAC full-scale range is also adjustable.
sync generation
The SYNC and SYNC_T control inputs enable the superposition of an additional current onto the AGY channel
or onto all three channels, depending on the setting of INS3_INT. Using a combination of the SYNC and
SYNC_T control inputs, either bi-level negative going pulses or tri-level pulses can be generated. By driving
these terminals with the correct timing inputs, the user can insert onto the analog output(s) any composite sync
format consisting of horizontal sync, vertical sync, pre- and post-serration, and equalization pulses. Assertion
of SYNC (active low) identifies the sync period, while assertion of SYNC_T (active high) within this period
identifies the positive excursion of a tri-level sync.
blanking generation
The BLANK control input fixes the output amplitude on all channels to the blanking level, irrespective of the value
on the data input ports. The position of the blanking level on each channel and its relation to active video is
different depending on the RGB versus YCbCr color space configuration: bottom-range blanking level for R,
G, B, and Y outputs versus mid-range blanking level for Pb and Pr outputs. This also depends on the full-scale
versus reduced-scale (ITU-R.BT601) input code range configuration: bottom-range blanking levels correspond
to input code 0 when in full-scale, or to code 64 when in reduced-scale input code range configuration;
mid-range blanking levels remain at 512 in all cases.
generic DAC mode versus video DAC mode
In video DAC mode, the device provides additional dc bias on R, G, B, and Y channels to provide headroom
for negative sync insertion, as shown on Figure 1 and Figure 3.
Such bias might be undesirable in applications where no sync embedding is needed, since it causes additional
power consumption and might prevent dc coupling of the DAC outputs. In such cases, only a triple DAC
operation without dc bias (i.e., DAC input code 0 corresponding to 0-V output) might be preferred as there is
no need for sync insertion. Therefore, the THS8135 includes a generic DAC mode that does not add any dc
bias. Sync insertion is not supported in generic DAC mode. Also, in this mode, only full-scale operation is
available. Other features are still available in generic DAC mode: different input data formats, RGB versus
YCbCr color space selection, and blanking level override option.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
THS8136 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 10-BIT 180-MSPS GRAPHICS AND VIDEO DAC
THS8136IPHP 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 Triple 10B 180MSPS Graphics & Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray
THS8136IPHPR 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 Triple 10B 180MSPS Graphics & Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray
THS8136PHP 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 Triple 10B 180MSPS Graphics & Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray
THS8136PHPR 功能描述:數(shù)字化視頻/模擬轉(zhuǎn)換器集成電路 Triple 10B 180MSPS Graphics & Video DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:3 輸出類型:Current 轉(zhuǎn)換速率:180 MSPs 分辨率:10 bit 接口類型:Parallel 電壓參考:Internal or External 積分非線性:- 2.5 LSB, 1.5 LSB 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:HTQFP 封裝:Tray
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