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參數(shù)資料
| 型號： | TLC32044MFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | VOICE-BAND ANALOG INTERFACE CIRCUITS |
| 中文描述： | 語音頻帶模擬接口電路 |
| 文件頁數(shù)： | 28/39頁 |
| 文件大?。?/td> | 535K |
| 代理商： | TLC32044MFK |
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TLC32044C, TLC32044E, TLC32044I, TLC32044M TLC32045C, TLC32045I
VOICE-BAND ANALOG INTERFACE CIRCUITS
SLAS017F – MARCH 1988 – REVISED MAY 1995
28
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 3. Gain Control Table (Analog Input Signal Required for Full-Scale A/D Conversion)
INPUT CONFIGURATIONS
CONTROL REGISTER
BITS
ANALOG INPUT
A/D
CONVERSION
RESULT
d6
1
0
1
0
1
0
1
0
d7
1
0
0
1
1
0
0
1
Differential configuration
Analog input = IN+ – IN–
Analog in ut = IN+ – IN–
ti l
±
6 V
Full scale
Full-scale
= AUX IN+ – AUX IN–
= AUX IN+ AUX IN
±
3 V
±
1.5 V
Full-scale
Full-scale
Single-ended configuration
Analog input = IN+ – ANLG GND
Analog in ut = IN+ – ANLG GND
= AUX IN+ – ANLG GND
= AUX IN+ ANLG GND
d d
±
3 V
Half scale
Half-scale
±
3 V
±
1.5 V
Full-sale
Full-scale
In this example, Vref is assumed to be 3 V. In order to minimize distortion, it is recommended that the analog
input not exceed 0.1 dB below full scale.
Figure 7. IN+ and IN– Gain Control Circuitry
–
+
+
–
Rfb
Rfb
R
R
IN+
IN–
To Multiplexer
Rfb = R for d6 = 1, d7 = 1
d6 = 0, d7 = 0
Rfb = 2R for d6 = 1, d7 = 0
Rfb = 4R for d6 = 0, d7 = 1
Figure 8. AUX IN+ and AUX IN–
Gain Control Circuitry
–
+
+
–
Rfb
Rfb
R
R
AUX IN+
AUX IN–
Rfb = R for d6 = 1, d7 = 1
d6 = 0, d7 = 0
Rfb = 2R for d6 = 1, d7 = 0
Rfb = 4R for d6 = 0, d7 = 1
To Multiplexer
(sin x)/x correction
The AIC does not have (sin x)/x correction circuitry after the digital-to-analog converter. (Sin x)/x correction can
be accomplished easily and efficiently in digital signal processor (DSP) software. Excellent correction accuracy
can be achieved to a band edge of 3000 Hz by using a first-order digital correction filter. The results, which are
shown in Table 4, are typical of the numerical correction accuracy that can be achieved for sample rates of
interest. The filter requires only seven instruction cycles per sample on the TMS(SMJ)320 DSPs. With a 200-ns
instruction cycle, nine instructions per sample represents an overhead factor of 1.4% and 1.7% for sampling
rates of 8000 Hz and 9600 Hz, respectively. This correction adds a slight amount of group delay at the upper
edge of the 300–3000-Hz band.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLC32045C | VOICE-BAND ANALOG INTERFACE CIRCUITS |
| TLC32045I | VOICE-BAND ANALOG INTERFACE CIRCUITS |
| TLC32046C | Wide-Band Analog Interface Circuit |
| TLC32046I | Wide-Band Analog Interface Circuit |
| TLC32046M | Wide-Band Analog Interface Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC32044MFK/B | 制造商:Rochester Electronics LLC 功能描述: |
| TLC32044MFKB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Linear CODEC |
| TLC32044MJ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:VOICE-BAND ANALOG INTERFACE CIRCUITS |
| TLC32044MJB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Linear CODEC |
| TLC32045C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:VOICE-BAND ANALOG INTERFACE CIRCUITS |
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