參數(shù)資料
型號(hào)： TLC320AD535C
廠商： Texas Instruments, Inc.
元件分類： Codec
英文描述： DUAL CHANNEL VOICE/DATA CODEC
中文描述： 雙通道語(yǔ)音/數(shù)據(jù)編解碼器
文件頁(yè)數(shù)： 30/84頁(yè)
文件大?。?/td> 447K
代理商： TLC320AD535C
2–15
2.15.6
By setting bits DS01 and DS00 to 11 in register 5, the normal analog input voltage is summed with the
auxiliary input voltage. The gain for the analog input amplifier is set by data bits DS03 and DS02 in register 4.
Enable Analog Input Summing
2.15.7
The (sin x)/x compensation filter is designed for zero (sin x)/x error using a B-register value of 15. Since the
filter cannot be removed from the signal path, operation using another B-register value results in an error
in the reconstructed analog output. The error is given by equation 19. Any error compensation needed by
a given application can be performed in the software.
DAC Channel (sin x)/x Error Correction
DAC channel frequency response error
20
log10
sin
2
A
B
fMCLK
f
sin
30
fMCLK
A
f
15
B
(19)
where:
f
= the frequency of interest
= the TLC320AC02 master-clock frequency
= the A-register value
= the B-register value
f
MCLK
A
B
and the arguments of the sin functions are in radians.
2.16 Serial Communications
2.16.1 Stand-Alone and Master-Mode Word Sequence and Information Content During
Primary and Secondary Communications
For the stand-alone and master modes, the sequence in Figure 2–2 shows the relationship between the
primary and secondary communications interval, the data content into DIN, and the data content from
DOUT.
The TLC320AC02 can provide a phase-shift command or the next secondary communications interval by
decoding 1) the programmed state of the FC1 and FC0 inputs and the D01 and D00 data bits in the primary
data word, or 2) the state of the FC1 and FC0 inputs and the DS15 and DS14 data bits in the secondary
data word (see Table 2–3). When DS13 (the R/W bit) is the default value of 0, all 16 bits from DOUT are
0 during secondary communication. However, when the R/W bit is set to 1 in the secondary communication
control word, the secondary transmission from DOUT still contains 0s in the eight MSBs. The lower order
8 bits contain the data of the register currently being addressed. This function provides register status
information for the host.
相關(guān)PDF資料
PDF描述
TLC320AD535C-I DUAL CHANNEL VOICE/DATA CODEC
TLC320AD535I DUAL CHANNEL VOICE/DATA CODEC
TLC320AC02I Single-Supply Analog Interface Circuit
TLC320AD50IPT SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION
TLC320AD50(中文) Sigma-Delta Analog Interface Circuit With Master-Slave Function(Sigma-Delta 模擬接口具主從功能)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLC320AD535C-I 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC
TLC320AD535I 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL CHANNEL VOICE/DATA CODEC
TLC320AD535IPM 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
TLC320AD535PM 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
TLC320AD545-EVM 制造商:Rochester Electronics LLC 功能描述:- Bulk
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