參數(shù)資料
型號： TLV2556IPW
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝： GREEN, PLASTIC, TSSOP-20
文件頁數(shù)： 15/37頁
文件大?。?/td> 729K
代理商： TLV2556IPW
TLV2556
SLAS355A – DECEMBER 2001 – REVISED SEPTEMBER 2002
22
www.ti.com
PARAMETER MEASUREMENT INFORMATION
timing diagrams
1
2
3
5
4
6
10
11
12
1
MSB–1 MSB–2 MSB–3 MSB–4 MSB–5
MSB–8 MSB–9 LSB+1
LSB
Hi–Z State
2
3
D6
D5
D4
D3
D2
D1
D0
D6
D5
D7
8
7
9
MSB–6 MSB–7
D7
Previous Conversion Data
MSB
MSB–2
MSB–1
Shift in New Multiplexer Address,
Simultaneously Shift Out Previous Conversion Result
Access
Cycle
Sample Cycle
Channel
Address
A/D Conversion Interval
Output Data
Format
tconv
CS
I/O
CLOCK
DATA
OUT
DATA
IN
EOC
Initialize
INT
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after the CS falling edge before responding to
control input signals. Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 46. Timing for 12-Clock Transfer Using CS With DATA OUT Set for MSB First
MSB
1
2
3
5
4
610
11
12
1
MSB–1 MSB–2 MSB–3 MSB–4 MSB–5
MSB–8 MSB–9 LSB+1
LSB
2
3
D6
D5
8
7
9
MSB–6 MSB–7
D7
Low Level
MSB
D6
D5
D4
D3
D2
D1
D0
D7
MSB–2
MSB–1
Shift in New Multiplexer Address,
Simultaneously Shift Out Previous Conversion Result
Access
Cycle
Sample Cycle
Channel
Address
A/D Conversion Interval
Output Data
Format
tconv
Previous Conversion Data
CS
I/O
CLOCK
DATA
OUT
DATA IN
EOC
INT
Initialize
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after the CS falling edge before responding to
control input signals. Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 47. Timing for 12-Clock Transfer Not Using CS With DATA OUT Set for MSB First
相關(guān)PDF資料
PDF描述
TLV2556IDWR 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV2556IPWR 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV2556IDW 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV2556IPWG4 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV2556MPWREP 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV2556IPW 制造商:Texas Instruments 功能描述:12BIT ADC 200KSPS 2556 TSSOP20 制造商:Texas Instruments 功能描述:12BIT ADC, 200KSPS, 2556, TSSOP20 制造商:Texas Instruments 功能描述:12BIT ADC, 200KSPS, 2556, TSSOP20; Resolution (Bits):12bit; Sampling Rate:200kSPS; Supply Voltage Type:Single; Supply Voltage Min:2.7V; Supply Voltage Max:5.5V; Supply Current:3mA; Digital IC Case Style:TSSOP; No. of Pins:20; Input ;RoHS Compliant: Yes
TLV2556IPWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV2556IPWR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV2556IPWRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV2556MPWREP 功能描述:模數(shù)轉(zhuǎn)換器 - ADC EP 12B,200KSPS,11Ch Low Pwr,Serial ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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