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參數(shù)資料
| 型號： | TLV320A11IPFBG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 27/55頁 |
| 文件大小： | 263K |
| 代理商： | TLV320A11IPFBG4 |
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3–5
M
Master FS
P
S2
P
S1
P
S0
P
M
S
S2
S
FC
(See Note)
S1
S
S0
M
P
FC pulse needs to be inserted any time
within the primary communication
NOTES: A. FC of master device and slave devices should be connected together
B. Primary communication interval = 256 SCLKs if cascading devices < 5
C. Primary communication interval = 512 SCLKs if cascading devices > 4
Figure 3–6. Output When Hardware Secondary Serial Communication Is Requested (Three Slaves)
3.2.3
Software Secondary Serial Communication Request
The LSB of the DAC data within a primary transfer can request a secondary communication through bit D0 of control
register 1 when the device is in the 15-bit mode.
For all serial communications, the most significant bit is transferred first. For a 16-bit ADC word and a 16-bit DAC word,
D15 is the most significant bit and D0 is the least significant bit. For a 15-bit DAC data word in a primary
communication, D15 is the most significant bit, D1 is the least significant bit. Bit D0 is then used for the secondary
communication request control. All digital data values are in 2s-complement data format (see Figure 3–7).
If the data format is set to 16-bit word, all 16 bits are either ADC or DAC data, and secondary communication can
only be requested by hardware (FC terminal), or control registers can be programmed by the direct configuration
mode.
PS
DIN
Register
FS
No Secondary
Communication Request
Data (D0 = 1)
Read/Write
P
Data (D0 = 0)
Secondary
Communication Request
Figure 3–7. FS Output During Software Secondary Serial Communication Request (No Slave)
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