參數(shù)資料
型號(hào): TLV320AIC22PT
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: ROHS COMPLIANT, PLASTIC, LQFP-48
文件頁(yè)數(shù): 7/55頁(yè)
文件大?。?/td> 782K
代理商: TLV320AIC22PT
TLV320AIC22
DUAL VOIP CODEC
SLAS281B – JULY 2000 – REVISED JUNE 2002
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td(1)
Delay time, BCLK
↑ to FSYNC↑ (slave mode)
15
ns
td(2)
Delay time, MCLK
↑ to BCLK↑ (slave mode)
29
ns
tsu(1)
Setup time, DIN valid before BCLK
10
ns
th(1)
Hold time, DIN valid after BCLK
9
ns
switching characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td(1)
Delay time, BCLK
↑ to FSYNC↑ (master mode)
5
10
ns
td(2)
Delay time, MCLK
↑ to BCLK ↑ (master mode)
19
29
ns
td(3)
Delay time, BCLK
↑ to DOUT valid
CL = 20 pF
25
ns
td(4)
Delay time, BCLK
↑ to FSYNC ↓ (master mode)
3
ns
td(5)
Delay time, BCLK
↓ to DOUT invalid
BCLK low time/
2 + td(2)
ns
td(6)
Delay time, BCLK
↑ to DOUT high impedance following last
data-bit transfer
25
ns
reset timing
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tw
RESET pulse width
2/MCLK
ns
th(r)
Wait time after RESET
10
s
D15
D14
D15
D14
td(2)
td(4)
td(1)
td(5)
td(3)
tsu(1)
th(1)
td(6)
MCLK
(input)
BCLK
(input/output)
FSYNC
(input/output)
DOUT
(output)
DIN
(input)
Figure 2. Digital I/O Timing for Data Channel
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