參數(shù)資料
型號: TLV5638QDREP
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO8
封裝: GREEN, PLASTIC, MS-012AA, SOIC-8
文件頁數(shù): 5/21頁
文件大?。?/td> 523K
代理商: TLV5638QDREP
TLV5638EP
2.7V TO 5.5V LOW POWER DUAL 12BIT DIGITALTOANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SGLS130B JULY 2002 REVISED DECEMBER 2003
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
Examples of operation:
D Set DAC A output, select fast mode, select internal reference at 2.048 V:
1.
Set reference voltage to 2.048 V (CONTROL register):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
1
0
2.
Write new DAC A value and update DAC A output:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
New DAC A output value
The DAC A output is updated on the rising clock edge after D0 is sampled.
To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL
register again.
D Set DAC B output, select fast mode, select external reference:
3.
Select external reference (CONTROL register):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
4.
Write new DAC B value to BUFFER and update DAC B output:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
New BUFFER content and DAC B output value
The DAC A output is updated on the rising clock edge after D0 is sampled.
To output data consecutively using the same DAC configuration, it is not necessary to program the CONTROL
register again.
D Set DAC A value, set DAC B value, update both simultaneously, select slow mode, select internal reference
at 1.024 V:
1.
Set reference voltage to 1.024 V (CONTROL register):
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
0
1
2.
Write data for DAC B to BUFFER:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
New DAC B value
3.
Write new DAC A value and update DAC A and B simultaneously:
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
1
0
New DAC A value
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