參數(shù)資料
型號(hào)： TMC2250A
廠商： Fairchild Semiconductor Corporation
英文描述： Matrix Multiplier 12 x 10 bit, 50 MHz
中文描述： 矩陣乘法12 × 10位，50兆赫
文件頁(yè)數(shù)： 18/23頁(yè)
文件大?。?/td> 186K
代理商： TMC2250A
PRODUCT SPECIFICATION
TMC2250A
18
REV. 1.0.2 10/25/00
Switching Characteristics
Application Notes
Performing Large-Kernel Pixel Interpolation
The Cascade Input and Output Ports of the TMC2250A allow the user to stack multiple devices to perform larger interpolation
kernels with no decrease in pixel throughput. Figure 12 illustrates a basic application utilizing Mode 11 to realize a 4 x 4-pixel
kernel, also called Cubic Convolution. This example utilizes the TMC2011A Variable-Length Shift Register to compensate for
the internal latency of each TMC2250A. Alternatively, some applications may utilize RAM, FIFO's, or other methods to store
multiple-line pixel data. In these cases the user may compensate for latency by simply offsetting the access sequencing of the
storage devices.
Figure 12. Figure 12. Performing Cubic Convolution with Two TMC2250A's
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Parameter
t
DO
t
HO
Conditions
Min
Typ
Max
15
Units
ns
ns
Output Delay Time
Output Hold Time
C
LOAD
= 25 pF
C
LOAD
= 25 pF
3
A
12
12
12
12
16
16
OUTPUT
B
A
B
A
B
C
D
CASOUT
CASOUT
CASIN
4 X 2 TMC2250A
3 X TMC2111A
4 X 2 TMC2250A
相關(guān)PDF資料
PDF描述
TMC2250AG1C Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AG1C2 Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AG1C3 Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AH6C JT 7C 7#20 PIN PLUG
TMC2250AH6C2 Matrix Multiplier 12 x 10 bit, 50 MHz
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMC2250AG1C 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AG1C2 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AG1C3 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AH5C 制造商:Rochester Electronics LLC 功能描述:- Bulk
TMC2250AH5C2 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz
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