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參數(shù)資料
| 型號： | TMC2250A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Matrix Multiplier 12 x 10 bit, 50 MHz |
| 中文描述： | 矩陣乘法12 × 10位，50兆赫 |
| 文件頁數(shù)： | 8/23頁 |
| 文件大?。?/td> | 186K |
| 代理商： | TMC2250A |
PRODUCT SPECIFICATION
TMC2250A
8
REV. 1.0.2 10/25/00
Table 5. Coef
fi
cient Input Ports
3 x 3 Matrix Multiplier (Mode 00)
This mode utilizes all six input and output ports in the basic
configuration to realize a "triple dot product", in which each
output is the sum of all three input words in that column
multiplied by the appropriate stored coefficients. The three
corresponding sums of products are available at the outputs
five clock cycles after the input data are latched, and three
new data words half-LSB rounded to 12 bits are then avail-
able every clock cycle.
X(5)=A(1)KA1(1)+B(1)KB1(1)+C(1)KC1(1)
Y(5)=A(1)KA2(1)+B(1)KB2(1)+C(1)KC2(1)
Z(5)=A(1)KA3(1)+B(1)KB3(1)+C(1)KC3(1)
Input Port
KA
KB
KC
Registers Available
KA1, KA2, KA3
KB1, KB2, KB3
KC1, KC2, KC3
Figure 1. 3 x 3 Matrix Multiplier Impulse Response (Mode 00)
1
01
10
11
0
0
1.0
0
00
0
0
KA1 + KB1 + KC1
KA2 + KB2 + KC2
KA3 + KB3 + KC3
K_1
K_2
K_3
00
CLK
CWE
KA, KB, KC
DATA IN A, B, C
MODE CONTROL
X OUT
Y OUT
Z OUT
2
3
4
5
6
7
8
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相關(guān)代理商/技術(shù)參數(shù) |
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| TMC2250AG1C | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
| TMC2250AG1C2 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
| TMC2250AG1C3 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
| TMC2250AH5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMC2250AH5C2 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Matrix Multiplier 12 x 10 bit, 50 MHz |
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