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參數(shù)資料
| 型號： | TMC2302A |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Image Manipulation Sequencer |
| 中文描述： | 圖像處理序列 |
| 文件頁數(shù)： | 14/36頁 |
| 文件大?。?/td> | 188K |
| 代理商： | TMC2302A |
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TMC2302A
PRODUCT SPECIFICATION
14
P
Transformation Parameter Registers
The Transformation Parameter Word storage register
addresses for the X/U device are listed in Table 2, along with
the differential terms for each polynomial coefficient for
both two and three-dimensional transforms. The polynomial
terms for the other IMS device(s) are found by replacing
every “X” in the table with a Y (or Z). A TMC2302A-based
system can perform image manipulations of up to third order
in two dimensions, and three-dimensional transforms of up
to order 1.5 (“first-and-a-half order”). Also, see “The Image
Transformation Polynomial”, in the Applications Discussion
section.
The notation used to define each polynomial coefficient term
in Table 2 is easily interpreted. Each differential is of course
defined by a differential in X, followed by the corresponding
dependent U, V, or W terms. Thus,
DXUV is equivalent to d
2
X/dUdV
and
DXUUUV to d
4
X/dU
3
dV.
Table 2. Transformation Polynomial Coefficient Register Addresses
Note:
1. The X
0
and DXU terms must each be loaded into two different registers when performing 3D transforms. Table 2 shows the
binary weighting of all of the Transformation Parameter words, which are 48-bit signed fractional binary.
Table 3. Integer Binary Weighting of Transformation Parameters
Note:
1. A minus sign indicates a sign bit.
Name
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Parameter
Coefficient Word Addresses (hex)
MSW
CSW
00
03
06
09
0C
0F
12
15
18
1B
1E
21
24
27
2A
2D
2D Term
X
0
DXU
DXUU
DXUUU
DXV
DXUV
DXUUV
DXUUUV
DXVV
DXUVV
DXUUVV
DXUUUVV
DXVVV
DXUVVV
DXUUVVV
DXUUUVVV
3D Term
X
0
DXU
LSW
02
05
08
0B
0E
11
14
17
1A
1D
20
23
26
29
2C
2F
01
04
07
0A
0D
10
13
16
19
1C
1F
22
25
28
2B
2E
DXV
DXUV
X
0
DXU
DXVW
DXUVW
DXW
DXUW
Format
Limits
MSB
-2
47
2
31
2
15
LSB
2
32
2
16
2
0
Dec
2
48
-1
Hex
MSB
2
46
2
30
2
14
2
45
2
29
2
13
2
44
2
28
2
12
2
43
2
27
2
11
2
42
2
26
2
10
2
41
2
25
2
9
2
40
2
24
2
8
2
39
2
23
2
7
2
38
2
22
2
6
2
37
2
21
2
5
2
36
2
20
2
4
2
35
2
19
2
3
2
34
2
18
2
2
2
33
2
17
2
1
FFFFFFFFFFFF
CSW
LSW
0
000000000000
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMC2302AH5C | Image Manipulation Sequencer |
| TMC2302AH5C1 | Image Manipulation Sequencer |
| TMC2302AKEC | Image Manipulation Sequencer |
| TMC2302AKEC1 | Image Manipulation Sequencer |
| TMC2330AH5C | Coordinate Transformer 16 x 16 Bit, 40 MOPS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2302AH5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC2302AH5C1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC2302AKEC | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer |
| TMC2302AKEC1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer |
| TMC2330A | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Coordinate Transformer 16 x 16 Bit, 40 MOPS |
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