參數(shù)資料
型號(hào): TMP320F2810PBKS
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: DIGITAL SIGNAL PROCESSORS
中文描述: 數(shù)字信號(hào)處理器
文件頁(yè)數(shù): 64/103頁(yè)
文件大小: 1341K
代理商: TMP320F2810PBKS
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
APRIL 2001
REVISED SEPTEMBER 2001
64
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
event manager modules (EVA, EVB) (continued)
GPTCONA(12:4), CAPCONA(8), EXTCONA[0]
EVTOADCA
Timer 1 Compare
Output
Logic
T1PWM_T1CMP
GPTCONA(1,0)
T1CON(1)
GP Timer 1
TCLKINA
Prescaler
HSPCLK
T1CON(10:8)
T1CON(5,4)
clock
Full Compare 1
Full Compare 2
Full Compare 3
SVPWM
State
Machine
Dead-
Band
Logic
Output
Logic
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
T1CON(15:11,6,3,2)
TDIRA
dir
Timer 2 Compare
GP Timer 2
1
Capture Units
COMCONA(15:5,2:0)
PDPINTA/T1CTRIP, T2CTRIP/EVASOC, C1TRIP, C2TRIP, C3TRIP
Output
Logic
T2PWM_T2CMP
GPTCONA(3,2)
T2CON(1)
T2CON(15:11,7,6,3,2,0)
ACTRA(15:12),
COMCONA(12),
T1CON(13:11)
CAPCONA(10,9)
1
DBTCONA(15:0)
ACTRA(11:0)
TCLKINA
Prescaler
HSPCLK
T2CON(10:8)
T2CON(5,4)
clock
dir
reset
CAPCONA(15:12,7:0)
CAP1_QEP1
CAP2_QEP2
CAP3_QEPI1
QEP
Logic
QEPCLK
QEPDIR
1
1
EVAENCLK
Control Logic
P
TDIRA
Index Qual
QEPCLK
QEPDIR
EXTCONA(1:2)
NOTE A: The EVB module is similar to the EVA module.
1
Figure 14. Event Manager A Functional Block Diagram
P
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