參數(shù)資料
型號: TMP96C141AF
廠商: Toshiba Corporation
英文描述: High Speed Advanced CMOS 16-bit Microcontroller For Controlling Medium to Large-Scale Equipment(用于中等到大型設備控制,高速、先進的 CMOS 16位微控制器)
中文描述: 采用先進的CMOS高速16位微控制器控制中的大型設備(用于中等到大型設備控制,高速,先進的的CMOS 16位微控制器)
文件頁數(shù): 9/178頁
文件大?。?/td> 5667K
代理商: TMP96C141AF
TOSHIBA CORPORATION
9
TMP96C141AF
3.3 Interrupts
The TLCS-900 interrupts are controlled by the CPU interrupt
mask flip-flop (IFF2 to 0) and the built-in interrupt controller.
The TMP96C141AF have altogether the following 23
interrupt sources:
A fixed individual interrupt vector number is assigned to
each interrupt source; six levels of priority (variable) can also
be assigned to each maskable interrupt. Non-maskable inter-
rupts have a fixed priority of 7.
When an interrupt is generated, the interrupt controller
sends the value of the priority of the interrupt source to the
CPU. When more than one interrupt is generated simulta-
neously, the interrupt controller sends the value of the highest
priority (7 for non-maskable interrupts is the highest) to the
CPU.
The CPU compares the value of the priority sent with the
value in the CPU interrupt mask register (IFF2 to 0). If the value
is greater than that of the CPU interrupt mask register, the
interrupt is accepted. The value in the CPU interrupt mask reg-
ister (IFF2 to 0) can be changed using the EI instruction (con-
tents of the EI num/IFF<2:0> = num). For example,
programming EI 3 enables acceptance of maskable interrupts
with a priority of 3 or greater, and non-maskable interrupts
which are set in the interrupt controller. The DI instruction
Interrupts from the CPU
(Software interrupts, privileged violations, and Illegal (undefined) instruction execution)
Interrupts from external pins (NMI, INT0, and INT4 to 7)
Interrupts from built-in I/Os
14
3
6
(IFF<2:0> = 7) operates in the same way as the EI 7 instruc-
tion. Since the priority values for maskable interrupts are 0 to 6,
the DI instruction is used to disable maskable interrupts to be
accepted. The EI instruction becomes effective immediately
after execution. (With the TLCS-90, the EI instruction becomes
effective after execution of the subsequent instruction.)
In addition to the general-purpose interrupt processing
mode described above, there is also a high-speed micro DMA
processing mode. High-speed micro DMA is a mode used by
the CPU to automatically transfer byte or word data. It enables
the CPU to process interrupts such as data saves to built-in I/Os
at high speed.
Figure 3.3 (1) is a flowchart showing overall interrupt
processing.
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相關代理商/技術參數(shù)
參數(shù)描述
TMP96C141BF 功能描述:16位微控制器 - MCU ROMLESS TLCS 900 w/ 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
TMP96C141BFG 功能描述:16位微控制器 - MCU 900 Romless MCU 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
TMP96CM40F 制造商:Toshiba America Electronic Components 功能描述:TLCS900 M/ROM, 32K ROM , 1K RAM - Tape and Reel
TMP96PM40F 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:Quality And Reliability Assurance / Handling Precautions
TMP96PM40F(Z) 功能描述:16位微控制器 - MCU 32K ROM OTP 1K RAM RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT