參數(shù)資料
型號: TMS279X
廠商: Texas Instruments, Inc.
英文描述: FLOPPY DISK FORMATTERICONTROLLER FAMILY
中文描述: 軟盤驅(qū)動FORMATTERICONTROLLER家庭
文件頁數(shù): 11/40頁
文件大?。?/td> 334K
代理商: TMS279X
TMS279X (WD279X) FLOPPY DISK FORMATTER / CONTROLLER FAMILY
11
data separation
The 279X can operate with either an external data separator or its own internal recovery circuits. The
condition of the TEST# line (pin 22) in conjunction with MR# (pin 19) will select internal or external mode.
To program the 279X for an external VCO, a MR# pulse must be applied while TEST# = 0. A clock
equivalent to eight times the data rate (e.g., 4.0 MHz for 8" double density) is applied to the VCO input (pin
26).The feedback reference voltage is available on the pump output (pin 23) for external integration to control
the VCO. TEST# is returned to a logic 1 for normal operation. Note: to maintain this mode, TEST# must be
held low whenever MR# is applied.
For internal VCO operation, the TEST# line must be high during the MR# pulse, then set to a logic 0 for the
adjustment procedure.
A 50 k potentiometer tied to the RPW input (pin 18) is used to set the internal read data pulse for proper
phasing. With a scope on pin 29 (TG43), adjust the RPW pulse for 1/8 of the data rate (250 ns for 8" double
density). An n external variable capacitor of 5-60 pF is tied to the VCO input (pin 26) for adjusting center
frequency. With a frequency counter on pin 16 (DIRC), adjust the trimmer cap to yield the appropriate data
rate (500 kHz for 8" double density). The DDEN# line must below while the 5#/8 line is held high or the
adjustment times above will be doubled.
After adjustments have been made, the TEST# pin is returned to a logic 1 and the device is ready for
operation. Adjustments may be made in-circuit since the DIRC and TG43 lines may toggle without affecting
the drive.
The PUMP output (pin 23) consists of positive and negative pulses; their duration is equivalent to the phase
difference of incoming data vs. VCO frequency. This signal is internally connected to the VCO input, but a
filter is needed to connect these pulses to a slow moving DC voltage.
The internal phase-detector is unsymmetrical for a random distribution of data pulses by a factor or two, in
favor of a PUMP UP condition. Therefore, it is desirable to have a PUMP DOWN twice as responsive to
prevent run-away during a lock attempt.
A first-order lag-lead filter can be used at the PUMP output (pin 23). This filter controls the instantaneous
response of the VCO to bit-shifted data (jitter) as well as the response to normal frequency shift, i.e., the
lock-up time. A balance must be accomplished between the two conditions to inhibit over- responsiveness to
jitter and to prevent an extremely wide lock-up response, leading to PUMP runaway. The filter affects these
two reactions in mutually opposite directions.
The following filter circuit is recommended for 8" FM/MFM:
Since 5 1/4" drives operate at exactly one-half the data rate (250 Kb/sec) the above capacitor should be
doubled to 0.2 μF or 0.22 μF.
type I commands
The Type I commands include the Restore, Seek, Step, Step-In, and Step-Out commands. Each of the Type
I commands contains a rate field (r0r1), which determines the stepping motor rate as defined in Table 3.
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