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參數(shù)資料
| 型號(hào)： | TMS279X |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | FLOPPY DISK FORMATTERICONTROLLER FAMILY |
| 中文描述： | 軟盤驅(qū)動(dòng)FORMATTERICONTROLLER家庭 |
| 文件頁數(shù)： | 26/40頁 |
| 文件大?。?/td> | 334K |
| 代理商： | TMS279X |
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TMS279X (WD279X) FLOPPY DISK FORMATTER / CONTROLLER FAMILY
26
CONTROL BYTES FOR INITIALIZATION
DATA PATTERN
IN DR (HEX)
TMS279X INTERPRETATION
IN FM (DDEN# = 1)
TMS279X INTERPRETATION
IN MFM (DDEN# = 0)
00 thru F4
Write 00 thru F4 with CLK = FF
Write 00 thru F4, in MFM
F5
Not Allowed
Write Al * in MFM, Preset CRC
F6
Not Allowed
Write C2 in MFM
F7
Generate 2 CRC bytes
Generate 2 CRC bytes
F8 thru FB
Write F8 thru FM CLK = C7, Preset CRC Write F8 thru FB, in MFM
FC
Write FC with CLK = D7
Write FC in MFM
FD
Write FD with CLK = FF
Write FD in MFM
FE
Write FE, CLK = C7, Preset CRC
Write FE in MFM
FF
Write FF with CLK = FF
Write FF in MFM
* Missing clock transition between bits 4 and 5.
Missing clock transition between bits 3 and 4.
type IV commands
The Forced Interrupt command is generally used to terminate a multiple sector read or write command or to
ensure Type I status in the status register. This command can be loaded into the command register at any
time. If there is a current command under execution (busy status bit set) the command will be terminated and
the busy status bit reset.
The lower four bits of the command determine the conditional interrupt as follows:
10 = Not-Ready to Ready Transition
11 = Ready to Not-Ready Transition
12 = Every Index Pulse
13 = Immediate Interrupt
The conditional interrupt is enabled when the corresponding bit positions of the command (l
3
– I
0
) are set to a
1. Then, when the condition for interrupt is met, the INTRQ line will go high signifying that the condition
specified has occurred. If l
3
– I
0
are all set to zero (HEX DO), no interrupt will occur but any command
presently under execution will be immediately terminated. When using the immediate interrupt condition
(l
3
= 1), an interrupt will be immediately generated and the current command terminated. Reading the status
or writing to the command register will not automatically clear the interrupt. The HEX DO is the only
command that will enable the immediate interrupt (HEX D8) to clear on a subsequent load command register
or read status register operation. Follow a HEX D8 with DO command.
Wait 8 μs (double density) or 16 μs (single density) before issuing a new command after issuing a forced
interrupt (times double when clock = 1 MHz). Loading a new command sooner than this will nullify the forced
interrupt.
Forced interrupt stops any command at the end of an internal micro-instruction and generates INTRQ when
the specified condition is met. Forced interrupt will wait until ALU operations in progress are complete (CRC
calculations, compares, etc.)
More than one condition may be set at a time. If for example, the READY TO NOT-READY condition (I
1
= 1)
and the Every Index Pulse (I
2
= 1) are both set, the resultant command would be HEX "DA" The "OR"
function is per formed so that either a READY TO NOT-READY or the next index pulse will cause an
interrupt condition.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS279XN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FLOPPY DISK FORMATTERICONTROLLER FAMILY |
| TMS27C/PC256-10 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C/PC256-12 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C/PC256-15 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C/PC256-17 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
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