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參數(shù)資料
| 型號： | TMS279X |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | FLOPPY DISK FORMATTERICONTROLLER FAMILY |
| 中文描述： | 軟盤驅(qū)動FORMATTERICONTROLLER家庭 |
| 文件頁數(shù)： | 23/40頁 |
| 文件大小： | 334K |
| 代理商： | TMS279X |
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TMS279X (WD279X) FLOPPY DISK FORMATTER / CONTROLLER FAMILY
23
types III commands
read address
Upon receipt of the Read Address command, the head is loaded and the busy status bit is set. The next
encountered ID field is then read in from the disk, and the six data bytes of the ID field are assembled and
transferred to the DR, and a DRQ is generated for each byte. The six bytes of the ID field are shown below:
TRACK
ADDR
1
SIDE
NUMBER
2
SECTOR
ADDRESS
3
SECTOR
LENGTH
4
CRC
1
5
CRC
2
6
Although the CRC characters are transferred to the computer, the 279X checks for validity and the CRC
error status bit is set if there is a CRC error. The track address of the ID field is written into the sector register
so that a comparison can be made by the host. At the end of the operation, an interrupt is generated and the
busy status is reset.
read track
Upon receipt of the Read Track command, the head is loaded, and the busy status bit is set. Reading starts
with the leading edge of the first encountered index pulse and continues until the next index pulse. All gap,
header, and data bytes are assembled and transferred to the data register and DRQ's are generated for
each byte. The accumulation of bytes is synchronized to each address mark encountered. An interrupt is
generated at the completion of the command.
This command has several characteristics which make it suitable for diagnostic purposes. They are: no CRC
checking is performed; gap information is included in the data stream; the internal side compare is not
performed; and the address mark detector is on for the duration of the command. Because the AM detector
is always on, write splices or noise may cause the chip to look for an AM if an address mark does not appear
on schedule with the lost data status flag being set.
The ID AM, ID field, ID CRC bytes, DAM, data and data CRC bytes for each sector will be correct. The gap
bytes may be read incorrectly during write-splice time because of synchronization
.
write track formatting the disk
(Refer to section on Type III commands for flowcharts.)
Formatting the disk is a relatively simple task when operating programmed I/0 or when operating under DMA
with a large amount of memory. Data and gap information must be provided at the computer interface.
Formatting the disk is accomplished by positioning the R/W head over the desired track number and issuing
the Write Track command.
Upon receipt of the Write Track command, the head is loaded and the busy status bit is set. Writing starts
with the leading edge of the first encountered index pulse and continues until the next index pulse, at which
time the interrupt is activated. The data request is activated immediately upon receiving the command, but
writing will not start until after the first byte has been loaded into the data register. If the DR has not been
loaded by the time the index pulse is encountered, the operation is terminated making the device not busy,
the lost data status bit is set, and the interrupt is activated. If a byte is not present in the DR when needed, a
byte of zeroes is substituted.
This sequence continues from one index mark to the next index mark. Normally, whatever data pattern
appears in the data register is written on the disk with a normal clock pattern. However, if the 279X detects a
data pattern of F5 thru FE in the data register, this is interpreted as data address marks with missing clocks
or CRC generation.
The CRC generator is initialized when any data byte from F8 to FE is about to be transferred from the DR to
the DSR or by receipt of F5 in MFM. An F7 pattern will generate two CRC characters in FM or MFM. As a
consequence, the patterns F5 thru FE must not appear in the gaps, data fields, or ID fields. Also, CRC's
must be generated by an F7 pattern.
Disks may be formatted in IBM 3740 or System 34 formats with sector lengths of 128, 256, 512, or 1024
bytes.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS279XN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FLOPPY DISK FORMATTERICONTROLLER FAMILY |
| TMS27C/PC256-10 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C/PC256-12 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C/PC256-15 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C/PC256-17 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27C256 32768 BY 8-BIT UV ERASABLE TMS27PC256 32768 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
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