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參數(shù)資料
| 型號： | TMS27C512-150 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Programmable Read-Only Memory(64K×8結(jié)構(gòu),可擦可編程只讀存儲器) |
| 中文描述： | 可編程只讀存儲器（64K的× 8結(jié)構(gòu)，可擦可編程只讀存儲器） |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 283K |
| 代理商： | TMS27C512-150 |
TMS27C512 524288-BIT UV ERSABLE PROGRAMMABLE
TMS27PC512 524288-BIT PROGRAMMABLE
READ-ONLY MEMORY
SMLS512F – NOVEMBER 1985 – REVISED JUNE 1995
5
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
initializing (TMS27PC512)
The one-time programmable TMS27PC512 PROM is provided with all bits in the logic high state, then logic lows
are programmed into the desired locations. Logic lows programmed into a PROM cannot be erased.
SNAP! Pulse programming
The 512K EPROM and OTP PROM are programmed using the TI SNAP! Pulse programming algorithm
illustrated by the flowchart in Figure 1, which programs in a nominal time of seven seconds. Actual programming
time varies as a function of the programmer used.
The SNAP! Pulse programming algorithm uses initial pulses of 100 microseconds (
μ
s) followed by a byte
verification to determine when the addressed byte has been successfully programmed. Up to 10 (ten) 100-
μ
s
pulses per byte are provided before a failure is recognized.
The programming mode is achieved with G/V
PP
= 13 V, V
CC
= 6.5 V, and E = V
IL
. Data is presented in parallel
(eight bits) on pins DQ0 to DQ7. Once addresses and data are stable, E is pulsed.
More than one device can be programmed when the devices are connected in parallel. Locations can be
programmed in any order. When the SNAP! Pulse programming routine is complete, all bits are verified with
V
CC
= 5 V, G/V
PP
= V
IL,
and E = V
IL
.
program inhibit
Programming can be inhibited by maintaining a high level input on the E pin.
program verify
Programmed bits can be verified when G/V
PP
and E = V
IL
.
signature mode
The signature mode provides access to a binary code identifying the manufacturer and type. This mode is
activated when A9 is forced to 12 V
±
0.5 V. Two identifier bytes are accessed by A0; i.e., A0 = V
IL
accesses
the manufacturer code, which is output on DQ0–DQ7; A0 = V
IH
accesses the device code, which is output on
DQ0–DQ7. All other addresses must be held at V
IL
. The manufacturer code for these devices is 97, and the
device code is 85.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS27C512-150JE4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| TMS27C512-150JL | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C512-150JL4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
| TMS27C512-15JE | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TMS27PC512 65536 BY 8-BIT PROGRAMMABLE READ-ONLY MEMORIES |
| TMS27C512-15JE4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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