參數(shù)資料
型號(hào)： TMS320AV220
廠商： Texas Instruments, Inc.
英文描述： Video CD MPEG Decoder(視頻CD MPEG編碼器)
中文描述： 視頻CD MPEG解碼器（視頻光盤(pán)的MPEG編碼器）
文件頁(yè)數(shù)： 4/31頁(yè)
文件大?。?/td> 612K
代理商： TMS320AV220
TMS320AV220
VIDEO CD MPEG DECODER
SCSS016A – JUNE 1994 – REVISED JANUARY 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
NAME NO.
I/O
DESCRIPTION
HSYNC
134
I
Horizontal synchronization, active low. HYSNC controls the ’AV220 pixel-data output horizontal-line
timing. HYSNC ties directly to the TMS320AV420 HYSNC output.
ICLK
55
O
Audio data clock. Each rising edge of ICLK indicates that compressed audio data is valid at ASOUT.
ICLK can be tied directly to ICLK of the TMS320AV120 audio decoder.
INT
83
O
Interrupt request, active low. INT goes low when an interrupt occurs and stays low until the
INTERRUPT register is read. INT is an open-drain output.
LCAS
47
O
Low-byte column-address strobe, active low. LCAS latches the DRAM column address for the lower
memory data byte, MD7–MD0.
LCASIN
22
I
Lower data-latch enable. The ’AV220 latches data coming from the low data byte of the DRAM
(MD7–MD0) on the rising edge of LCASIN. Typically, LCASIN is connected to the DRAM CAS terminal
mechanically farthest from the ’AV220.
MA9
MA8
MA7
MA6
MA5
MA4
MA3
MA2
MA1
MA0
3
4
5
7
8
9
10
12
13
14
O
DRAM memory address. The ’AV220 multiplexes the row and column addresses on MA9–MA0 to
address 4 Mbits of DRAM (see the section on DRAM interface for more information about how the
address signals are used with different DRAM components and DRAM array sizes).
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
38
36
35
34
31
30
29
28
26
25
24
23
20
19
18
17
I/O
DRAM memory data bus. Data is transferred between the ’AV220 and the local DRAM memory via
MD15–MD0. The direction of the data transfer is determined by the state of WE.
MREQ
84
I
Memory-access request, active low. MREQ requests a memory or register read/write by the host
processor.
MUTE
52
O
Audio mute, active low. The ’AV220 asserts MUTE during fast mode and when the audio buffer is empty
and EOS is detected. MUTE is also asserted if a bit error occurs in the packet length causing the packet
to be discarded. MUTE ties directly to the MUTE input of the TMS320AV120 audio decoder.
NC
1, 40, 41,
80, 81,
120, 121,
160
No connect. These terminals must be left floating.
NTSC
75
I
NTSC/PAL video output select. When NTSC is low, the video output is in the NTSC format. When
NTSC is high, the video output is in the PAL format.
相關(guān)PDF資料
PDF描述
TMS320AV410 Digital NTSC/PAL Encoder(數(shù)字NTSC/PAL編碼器)
TMS320AV411 Digital NTSC/PAL Encoder(數(shù)字NTSC/PAL編碼器)
TMS320AV420 Digital NTSC Encoder(數(shù)字NTSC編碼器)
TMS320C6424_1 Fixed-Point Digital Signal Processor
TMS320C6455ZTZ Fixed-Point Digital Signal Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320AV220PCM 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Audio/Video Decoder for MPEG
TMS320AV410 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Color Encoder Circuit
TMS320AV410PJM 制造商:Rochester Electronics LLC 功能描述:- Bulk
TMS320AV411 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Color Encoder Circuit
TMS320AV411PJM 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*