- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19343 > TMS320C6414TZLZ7 (Texas Instruments)IC DSP FIXED-POINT 532-FCBGA PDF資料下載
參數(shù)資料
| 型號： | TMS320C6414TZLZ7 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 91/146頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP FIXED-POINT 532-FCBGA |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | TMS320C6414T/15T/16T |
| 類型： | 定點 |
| 接口： | 主機接口，McBSP，PCI，UTOPIA |
| 時鐘速率： | 720MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 1.03MB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.20V |
| 工作溫度： | 0°C ~ 90°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 532-BFBGA，F(xiàn)CBGA |
| 供應(yīng)商設(shè)備封裝： | 532-FCBGA（23x23） |
| 包裝： | 托盤 |
| 配用： | TMDXEVM6452-ND - TMDXEVM6452 296-23038-ND - DSP STARTER KIT FOR TMS320C6416 |
| 其它名稱： | 296-19386 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁當(dāng)前第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁
TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M NOVEMBER 2003 REVISED APRIL 2009
49
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
DESCRIPTION
NAME
NO.
TYPE
IPD/
IPU
DESCRIPTION
EMIFB (16-bit) CONTROL SIGNALS COMMON TO ALL TYPES OF MEMORY||k
BCE3
A13
O/Z
IPU
EMIFB memory space enables
BCE2
C12
O/Z
IPU
EMIFB memory space enables
Enabled by bits 26 through 31 of the word address
BCE1
B12
O/Z
IPU
Enabled by bits 26 through 31 of the word address
Only one pin is asserted during any external data access
BCE0
A12
O/Z
IPU
Only one pin is asserted during any external data access
BBE1
D13
O/Z
IPU
EMIFB byte-enable control
Decoded from the low-order address bits. The number of address bits or byte enables
used depends on the width of external memory.
BBE0
C13
O/Z
IPU
used depends on the width of external memory.
Byte-write enables for most types of memory
Can be directly connected to SDRAM read and write mask signal (SDQM)
BPDT
E12
O/Z
IPU
EMIFB peripheral data transfer, allows direct transfer between external peripherals
EMIFB (16-BIT) BUS ARBITRATION||k
BHOLDA
E13
O
IPU
EMIFB hold-request-acknowledge to the host
BHOLD
B19
I
IPU
EMIFB hold request from the host
BBUSREQ
E14
O
IPU
EMIFB bus request output
EMIFB (16-BIT) ASYNCHRONOUS/SYNCHRONOUS MEMORY CONTROL||k
BECLKIN
A11
I
IPD
EMIFB external input clock. The EMIFB input clock (BECLKIN, CPU/4 clock, or CPU/6 clock)
is selected at reset via the pullup/pulldown resistors on the BEA[15:14] pins.
BECLKIN is the default for the EMIFB input clock.
BECLKOUT2
D11
O/Z
IPD
EMIFB output clock 2. Programmable to be EMIFB input clock (BECLKIN, CPU/4 clock, or
CPU/6 clock) frequency divided by 1, 2, or 4.
BECLKOUT1
D12
O/Z
IPD
EMIFB output clock 1 [at EMIFB input clock (BECLKIN, CPU/4 clock, or CPU/6 clock)
frequency].
BARE/
BSDCAS/
BSADS/BSRE
A10
O/Z
IPU
EMIFB asynchronous memory read-enable/SDRAM column-address strobe/programmable
synchronous interface-address strobe or read-enable
For programmable synchronous interface, the RENEN field in the CE Space Secondary
Control Register (CExSEC) selects between BSADS and BSRE:
If RENEN = 0, then the BSADS/BSRE signal functions as the BSADS signal.
If RENEN = 1, then the BSADS/BSRE signal functions as the BSRE signal.
BAOE/
BSDRAS/
BSOE
B11
O/Z
IPU
EMIFB asynchronous memory output-enable/SDRAM row-address strobe/programmable
synchronous interface output-enable
BAWE/BSDWE/
BSWE
C11
O/Z
IPU
EMIFB asynchronous memory write-enable/SDRAM write-enable/programmable synchro-
nous interface write-enable
BSOE3
E15
O/Z
IPU
EMIFB synchronous memory output enable for BCE3 (for glueless FIFO interface)
BARDY
E11
I
IPU
EMIFB asynchronous memory ready input
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used.)
|| These C64x devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal
whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of
discussion, the prefix “A” or “B” may be omitted from the signal name.
kTo maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| JWS60024 | PWR SUP 24.0V 27A SNG OUTPUT |
| AMC18DRYN-S734 | CONN EDGECARD 36POS DIP .100 SLD |
| A54SX16A-TQG100 | IC FPGA 180I/O 100TQFP |
| A40MX04-VQG80 | IC FPGA 69I/O 80VQFP |
| R24P215S/P/R6.4 | CONV DC/DC 2W 24VIN 15VOUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320C6414TZLZ8 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| TMS320C6414TZLZA6 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMS320C6414TZLZA7 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| TMS320C6414TZLZA8 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMS320C6415 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。