SPRS372H – MAY 2007 – REVISED APRIL 2012
PCI host via the integrated PCI master/slave bus interface. The PCI port interfaces to the
DSP via the enhanced DMA (EDMA) controller. This architecture allows for both PCI master
and slave transactions, while keeping the EDMA channel resources available for other
applications.
TMS320DM647/DM648 DSP Host Port Interface (UHPI) User's Guide describes the host
port interface (HPI) in the TMS320DM647/DM648 Digital Signal Processor (DSP). The HPI is
a parallel port through which a host processor can directly access the CPU memory space.
The host device functions as a master to the interface, which increases ease of access. The
host and CPU can exchange information via internal or external memory. The host also has
direct access to memory-mapped peripherals. Connectivity to the CPU memory space is
provided through the enhanced direct memory access (EDMA) controller.
TMS320DM647/DM648 DSP Universal Asynchronous Receiver/Transmitter (UART)
User's Guide describes the universal asynchronous receiver/transmitter (UART) peripheral
in the TMS320DM647/DM648 Digital Signal Processor (DSP). The UART peripheral
performs serial-to-parallel conversion on data received from a peripheral device, and
parallel-to-serial conversion on data received from the CPU.
TMS320DM647/DM648 DSP VLYNQ Port User's Guide describes the VLYNQ port in the
TMS320DM647/DM648 Digital Signal Processor (DSP). The VLYNQ port is a high-speed
point-to-point serial interface for connecting to host processors and other VLYNQ compatible
devices. It is a full-duplex serial bus where transmit and receive operations occur separately
and simultaneously without interference.
TMS320DM647/DM648 DSP Video Port/VCXO Interpolated Control (VIC) Port User's
Guide discusses the video port and VCXO interpolated control (VIC) port in the
TMS320DM647/DM648 Digital Signal Processor (DSP). The video port can operate as a
video capture port, video display port, or transport channel interface (TCI) capture port. The
VIC port provides single-bit interpolated VCXO control with resolution from 9 bits to up to 16
bits. When the video port is used in TCI mode, the VIC port is used to control the system
clock, VCXO, for MPEG transport channel.
TMS320DM647/DM648 DSP Serial Port Interface (SPI) User's Guide discusses the Serial
Port Interface (SPI) in the TMS320DM647/DM648 Digital Signal Processor (DSP). This
reference guide provides the specifications for a 16-bit configurable, synchronous serial
peripheral interface. The SPI is a programmable-length shift register, used for high speed
communication between external peripherals or other DSPs.
TMS320DM647/DM648 DSP Subsystem User's Guide describes the subsystem in the
TMS320DM647/DM648 Digital Signal Processor (DSP). The subsystem is responsible for
performing digital signal processing for digital media applications. The subsystem acts as the
overall system controller, responsible for handling many system functions such as system-
level initialization, configuration, user interface, user command execution, connectivity
functions, and overall system control.
TMS320DM647/DM648 DSP 3 Port Switch (3PSW) Ethernet Subsystem User's Guide
describes the operation of the 3 port switch (3PSW) ethernet subsystem in the
TMS320DM647/DM648 Digital Signal Processor (DSP). The 3 port switch gigabit ethernet
subsystem provides ethernet packet communication and can be configured as an ethernet
switch (DM648 only). It provides the serial gigabit media independent interface (SGMII), the
management data input output (MDIO) for physical layer device (PHY) management.
Copyright 2007–2012, Texas Instruments Incorporated
Device Overview
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