參數(shù)資料
型號： TMS320F243FN
廠商： Texas Instruments, Inc.
英文描述： 200mA, 40kHz PWM Control Circuit with 5.2V UVLO Threshold and 48% Max Duty Cycle; Package: SOIC 16 LEAD; No of Pins: 16; Container: Rail; Qty per Container: 48
中文描述： DSP控制器
文件頁數(shù)： 86/123頁
文件大?。?/td> 1205K
代理商： TMS320F243FN
www.ti.com
6.4.2
Current Consumption Graphs
0.0
50.0
100.0
150.0
200.0
250.0
10
20
30
40
50
60
70
80
90
100
SYSCLKOUT (MHz)
C
IDD
IDDA18
IDDIO
IDD3VFL
3.3-V current
1.8-V current
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 6-4. Typical Current Consumption by Various
Peripherals (at 100 MHz)
(1)
PERIPHERAL
MODULE
ADC
I2C
eQEP
ePWM
eCAP
SCI
SPI
eCAN
I
CURRENT
REDUCTION (mA)
8
(2)
5
5
5
2
4
5
11
(1)
All peripheral clocks are disabled upon reset. Writing to/reading
from peripheral registers is possible only after the peripheral clocks
are turned on.
This number represents the current drawn by the digital portion of
the ADC module. Turning off the clock to the ADC module results in
the elimination of the current drawn by the analog portion of the
ADC (I
DDA18
) as well.
(2)
NOTE
The baseline I
DD
current (current when the core is executing a dummy loop with no
peripherals enabled) is 110 mA, typical. To arrive at the I
current for a given application,
the current-drawn by the peripherals (enabled by that application) must be added to the
baseline I
DD
current.
Figure 6-1. Typical Operational Current Versus Frequency (F2808)
86
Electrical Specifications
相關(guān)PDF資料
PDF描述
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