參數(shù)資料
型號(hào)： TMS320LC2402
廠商： Texas Instruments, Inc.
英文描述： 32A 24-32V Transient Suppressor ; Package: Can Button; No of Pins: 2; Container: Bulk; Qty per Container: 5000
中文描述： DSP控制器
文件頁數(shù)： 23/123頁
文件大小： 1205K
代理商： TMS320LC2402
www.ti.com
3.1
Memory Map
0x00 0000
Block Start
Address
Data Space
Prog Space
M0 SARAM (1 K 16)
M1 SARAM (1 K 16)
0x00 0400
Peripheral Frame 0
0x00 0800
0x00 0D00
Peripheral Frame 1
(protected)
0x00 6000
Peripheral Frame 2
(protected)
0x00 7000
L0 SARAM (0-wait)
(4 k 16, Secure Zone, Dual Mapped)
0x00 8000
(4 k 16,L1 SARAM (0-wait)
0x00 9000
H0 SARAM (0-wait)
(8 k 16, Dual Mapped)
0x00 A000
0x00 C000
(1 k 16,OTP
0x3D 7800
0x3D 7C00
(64 k 1FLASH
0x3E 8000
0x3F 7FF8
128-bit Password
(4 k 16,L0 SARAM (0-wait)
0x3F 8000
L1 SARAM (0-wait)
(4 k 16, Secure Zone, Dual Mapped)
0x3F 9000
H0 SARAM (0-wait)
(8 k 16, Dual Mapped)
0x3F A000
0x3F F000
Boot ROM (4 k 16)
Vectors (32 32)
(enabled if VMAP = 1, ENPIE = 0)
0x3F FFC0
L
(
H
(
Reserved
PIE Vector RAM
(256 x 16)
(Enabled if ENPIE = 1)
0x00 0E00
0x3F C000
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
A.
B.
Memory blocks are not to scale.
Peripheral Frame 0, Peripheral Frame 1, and Peripheral Frame 2 memory maps are restricted to data memory only.
User program cannot access these memory maps in program space.
“ Protected” means the order of Write followed by Read operations is preserved rather than the pipeline order.
Certain memory ranges are EALLOW protected against spurious writes after configuration.
C.
D.
Figure 3-2. F2808 Memory Map
Functional Overview
23
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