參數(shù)資料
型號: TMS320LC545
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processors(20/25ns指令周期, 高性能,大并行度,特殊指令集可有效實(shí)現(xiàn)多種復(fù)雜算法及應(yīng)用的DSP)
中文描述: 數(shù)字信號處理器(20/25ns指令周期,高性能,大并行度,特殊指令集可有效實(shí)現(xiàn)多種復(fù)雜算法及應(yīng)用的數(shù)字信號處理器)
文件頁數(shù): 5/107頁
文件大小: 2149K
代理商: TMS320LC545
TMS320C54x, TMS320LC54x
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS039A – FEBRUARY 1996 – REVISED JULY 1997
2
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
description
The TMS320C54x and TMS320LC54x fixed-point, digital signal processor (DSP) families are based on an
advanced modified Harvard architecture that has one program memory bus and three data memory buses.
These processors also provide an arithmetic logic unit (ALU) that has a high degree of parallelism,
application-specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families
also provide a highly specialized instruction set, which is the basis of the operational flexibility and speed of
these DSPs.
Separate program and data spaces allow simultaneous access to program instructions and data, providing the
high degree of parallelism. Two reads and one write operation can be performed in a single cycle. Instructions
with parallel store and application-specific instructions can fully utilize this architecture. In addition, data can be
transferred between data and program spaces. Such parallelism supports a powerful set of arithmetic, logic,
and bit-manipulation operations that can all be performed in a single machine cycle. In addition, the ’C54x and
’LC54x versions include the control mechanisms to manage interrupts, repeated operations, and function calls.
Table 1 provides an overview of the ’C54x/’LC54x generation of DSPs. The table shows significant features of
each device including the capacity of on-chip RAM and ROM memories, the peripherals, the execution time of
one machine cycle, and the type of package with its total pin count.
Table 1. Characteristics of the ’C54x/’LC54x Processors
DSP TYPE
NOMINAL
VOLTAGE (V)
ON-CHIP
MEMORY
RAM
(Word)
PERIPHERALS
CYCLE
TIME (ns)
PACKAGE TYPE
ROM
(Word)
28K
28K
SERIAL
PORT
2
2
2
2||
2||
2||
2||
TIMER
HPI
TMS320C541
5.0
5K
1
No
25
100-pin TQFP
TMS320LC541
3.3
5K
1
No
20/25
100-pin TQFP
TMS320C542
5.0
10K
2K
1
Yes
25
144-pin TQFP
TMS320LC542
3.3
10K
2K
1
Yes
20/25
128-pin TQFP/144-pin TQFP
TMS320LC543
3.3
10K
2K
48K#
48K#
48K#
48K#
1
No
20/25
100-pin TQFP
TMS320LC545
3.3
6K
1
Yes
20/25
128-pin TQFP
TMS320LC545A
3.3
6K
1
Yes
15/20/25
128-pin TQFP
TMS320LC546
3.3
6K
1
No
20/25
100-pin TQFP
TMS320LC546A
3.3
6K
1
No
15/20/25
100-pin TQFP
144-pin TQFP/144-pin star
BGA
TMS320LC548
3.3
32K
2K
3
1
Yes
15/20
Legend:
TQFP = Thin Quad Flatpack
BGA = Ball Grid Array
The dual-access RAM can be configured as data memory or program/data memory.
For ’C541/’LC541, 8K words of ROM can be configured as program memory or program/data memory.
§Two standard serial ports
One TDM and one BSP
#For ’LC545/’LC546, 16K words of ROM can be configured as program memory or program/data memory.
||One standard and
one BSP
One TDM and two BSPs
A
star is a trademark of Texas Instruments Incorporated.
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