參數(shù)資料
型號: TMS320LF2407APGEA
廠商: TEXAS INSTRUMENTS INC
元件分類: 數(shù)字信號處理
英文描述: 16-BIT, 20 MHz, OTHER DSP, PQFP144
封裝: GREEN, PLASTIC, LQFP-144
文件頁數(shù): 82/134頁
文件大小: 1724K
代理商: TMS320LF2407APGEA
TMS320LF2407A,TMS320LF2406A,TMS320LF2403A,TMS320LF2402A
TMS320LC2406A,TMS320LC2404A,TMS320LC2403A,TMS320LC2402A
DSP CONTROLLERS
SPRS145L JULY 2000 REVISED SEPTEMBER 2007
51
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
controller area network (CAN) module
The CAN module is a full-CAN controller designed as a 16-bit peripheral module and supports the following
features:
D CAN specification 2.0B (active)
Standard data and remote frames
Extended data and remote frames
D Six mailboxes for objects of 0- to 8-byte data length
Two receive mailboxes, two transmit mailboxes
Two configurable transmit/receive mailboxes
D Local acceptance mask registers for mailboxes 0 and 1 and mailboxes 2 and 3
D Configurable standard or extended message identifier
D Programmable bit rate
D Programmable interrupt scheme
D Readable error counters
D Self-test mode
In this mode, the CAN module operates in a loop-back fashion, receiving its own transmitted message.
The CAN module is a 16-bit peripheral. The accesses are split into the control/status-registers accesses and
the mailbox-RAM accesses.
CAN peripheral registers: The CPU can access the CAN peripheral registers only using 16-bit write accesses.
The CAN peripheral always presents full 16-bit data to the CPU bus during read cycles.
CAN controller architecture
Figure 13 shows the basic architecture of the CAN controller through this block diagram of the CAN Peripherals.
Temporary Receive Buffer
Data
ID
CAN Module
Control Logic
CPU Interface/
Memory Management Unit
CAN
Core
Control/Status Registers
Interrupt Logic
Control Bus
Acceptance Filter
Transmit Buffer
RAM 48x16
CANTX
CAN
Transceiver
Matchid
CPU
mailbox 0
mailbox 1
mailbox 2
mailbox 3
mailbox 4
mailbox 5
R
T/R
T
CANRX
Figure 13. CAN Module Block Diagram
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