參數(shù)資料
型號(hào): TMX320DM648ZUT900
廠商: Texas Instruments, Inc.
英文描述: Digital Media Processor
中文描述: 數(shù)字媒體處理器
文件頁數(shù): 142/166頁
文件大?。?/td> 1341K
代理商: TMX320DM648ZUT900
www.ti.com
P
8
7
4
4
3
2
2
1
A0
A1
B0
B1
A30 A31
B30 B31 C0 C1
C2 C3
C31
AHCLKR/X (Falling Edge Polarity)
AHCLKR/X (Rising Edge Polarity)
AFSR/X (Bit Width, 0 Bit Delay)
AFSR/X (Bit Width, 1 Bit Delay)
AFSR/X (Bit Width, 2 Bit Delay)
AFSR/X (Slot Width, 0 Bit Delay)
AFSR/X (Slot Width, 1 Bit Delay)
AFSR/X (Slot Width, 2 Bit Delay)
AXR[n] (Data In/Receive)
6
5
ACLKR/X (CLKRP = CLKXP = 0)
(A)
ACLKR/X (CLKRP = CLKXP = 1)
(B)
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
A.
For CLKRP = CLKXP = 0, the McASP transmitter is configured for rising edge (to shift data out) and the McASP
receiver is configured for falling edge (to shift data in).
For CLKRP = CLKXP = 1, the McASP transmitter is configured for falling edge (to shift data out) and the McASP
receiver is configured for rising edge (to shift data in).
B.
Figure 6-40. McASP Input Timing
Peripheral Information and Electrical Specifications
142
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