參數(shù)資料
型號： TMX320F2810PGFS
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DIGITAL SIGNAL PROCESSORS
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 22/103頁
文件大?。?/td> 1341K
代理商： TMX320F2810PGFS
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
–
APRIL 2001
–
REVISED SEPTEMBER 2001
22
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
register map (continued)
Table 4. Peripheral Frame 0 Registers
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE
CPU Emulation Register Space
0x0000 0800
0x0000 087F
128
EALLOW protected
Device Emulation Registers
0x0000 0880
0x0000 09FF
384
EALLOW protected
reserved
0x0000 0A00
0x0000 0B00
128
FLASH Registers
0x0000 0A80
0x0000 0ADF
96
EALLOW protected
CSM Protected
Code Security Module Registers
0x0000 0AE0
0x0000 0AEF
16
EALLOW protected
reserved
0x0000 0AF0
0x0000 0B1F
48
XINTF Registers
0x0000 0B20
0x0000 0B3F
32
Not EALLOW protected
reserved
0x0000 0B40
0x0000 0BFF
192
CPU-TIMER0/1/2 Registers
0x0000 0C00
0x0000 0C3F
64
Not EALLOW protected
reserved
0x0000 0C40
0x0000 0CDF
160
PIE Registers
0x0000 0CE0
0x0000 0CFF
32
Not EALLOW protected
PIE Vector Table
0x0000 0D00
0x0000 0DFF
256
EALLOW protected
reserved
0x0000 0E00
0x0000 0FFF
512
If registers are EALLOW protected, then writes cannot be performed until the user executes the EALLOW instruction. The EDIS instruction
disables writes. This prevents stray code or pointers from corrupting register contents.
The Flash Registers are also protected by the Code Security Module (CSM).
Table 5. Peripheral Frame 1 Registers
§
NAME
ADDRESS RANGE
SIZE (x16)
ACCESS TYPE
eCAN Registers
0x0000 6000
0x0000 61FF
512
User Accessible
reserved
0x0000 6200
0x0000 6FFF
3584
§
Peripheral Frame 1 allows 16-bit and 32-bit accesses. All 32-bit accesses are aligned to even address boundaries.
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