VBB Negative power supply pin
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鍨嬭櫉锛� TP3057WM/NOPB
寤犲晢锛� National Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 12/18闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC INTERFACE ENHANCED SER 16SOIC
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闆诲 - 闆绘簮锛屾ā鎿細 ±5V
闆诲 - 闆绘簮锛屾暩(sh霉)瀛楋細 ±5V
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灏佽/澶栨锛� 16-SOIC锛�0.295"锛�7.50mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 16-SOIC W
鍖呰锛� 绠′欢
鍏跺畠鍚嶇ū锛� *TP3057WM
*TP3057WM/NOPB
TP3057WM
TP3057WM-ND
Block Diagram
FIGURE 1
TLH5510 鈥� 2
Pin Description
Symbol
Function
VBB
Negative power supply pin
VBB eb5V g5%
GNDA
Analog ground All signals are referenced
to this pin
VFRO
Analog output of the receive power ampli-
fier
VCC
Positive power supply pin
VCC ea5V g5%
FSR
Receive frame sync pulse which enables
BCLKR to shift PCM data into DR FSR is
an 8 kHz pulse train See
Figures 2 and 3
for timing details
DR
Receive data input PCM data is shifted
into DR following the FSR leading edge
BCLKR CLKSEL The bit clock which shifts data into DR af-
ter the FSR leading edge May vary from
64 kHz to 2048 MHz Alternatively may
be a logic input which selects either
1536 MHz1544 MHz or 2048 MHz for
master clock in synchronous mode and
BCLKX is used for both transmit and re-
ceive directions (see Table I)
MCLKR PDN
Receive
master
clock
Must
be
1536 MHz 1544 MHz or 2048 MHz
May be asynchronous with MCLKX but
Symbol
Function
should be synchronous with MCLKX for best per-
formance When MCLKR is connected continu-
ously low MCLKX is selected for all internal tim-
ing When MCLKR is connected continuously
high the device is powered down
MCLKX
Transmit master clock Must be 1536 MHz
1544 MHz or 2048 MHz May be asynchronous
with MCLKR Best performance is realized from
synchronous operation
FSX
Transmit frame sync pulse input which enables
BCLKX to shift out the PCM data on DX FSX is
an 8 kHz pulse train see
Figures 2 and 3 for
timing details
BCLKX
The bit clock which shifts out the PCM data on
DX May vary from 64 kHz to 2048 MHz but
must be synchronous with MCLKX
DX
The TRI-STATE
PCM data output which is en-
abled by FSX
TSX
Open drain output which pulses low during the
encoder time slot
GSX
Analog output of the transmit input amplifier
Used to externally set gain
VFXIb
Inverting input of the transmit input amplifier
VFXIa
Non-inverting input of the transmit input amplifi-
er
2
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
TP3057V/NOPB IC INTERFACE ENHANCED SER 20PLCC
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VI-26B-CU CONVERTER MOD DC/DC 95V 200W
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鍙冩暩(sh霉)鎻忚堪
TP3057WMX 鍔熻兘鎻忚堪:鎺ュ彛鈥擟ODEC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 椤炲瀷: 鍒嗚鲸鐜�: 杞�(zhu菐n)鎻涢€熺巼:48 kSPs 鎺ュ彛椤炲瀷:I2C ADC 鏁�(sh霉)閲�:2 DAC 鏁�(sh霉)閲�:4 宸ヤ綔闆绘簮闆诲:1.8 V, 2.1 V, 2.3 V to 5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:DSBGA-81 灏佽:Reel
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TP3058 鍒堕€犲晢:NSC 鍒堕€犲晢鍏ㄧū:National Semiconductor 鍔熻兘鎻忚堪:MICROPROCESSOR COMPATIBLE COMBO-R
TP3058J 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:u-Law CODEC
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