www.ti.com................................................................................................................................................. SLOS598A – MARCH 2009 – REVISED OCTOBER 2009
Output Impedance Register (Address: 3)
BIT
7
6
5
4
3
2
1
0
Function
0
HiZ_L
HiZ_R
Reset Value
0
Reserved These bits are reserved for future enhancements. Do not write to these bits as writing to these bits
may change device function. If read these bits may assume any value.
HiZ_L
Set to 1 to put left channel amplifier output in three-state high impedance mode.
HiZ_R
Set to 1 to put right channel amplifier output in three-state high impedance mode.
I2C Address and Version Register (Address: 4)
BIT
7
6
5
4
3
2
1
0
Function
0
Version[3]
Version[2]
Version[1]
Version[0]
Reset Value
0
Version[3:0] The version bits track the revision of the silicon. Valid values are 0000 for the first silicon
TPA6140A2.
Reserved for Test (Addresses: 5-8)
BIT
7
6
5
4
3
2
1
0
Function
RFT
Reset Value
x
RFT
Reserved for Test. Do NOT write to these registers.
VOLUME CONTROL
Set the TPA6140A2 volume control through the I2C interface. Write to the Volume[5:0] byte at Register 2, Bits
5-0. Although the gain byte is a 6-bit word, only 32 steps are available. The least significant bit of the
Volume[5:0] byte is treated as a don’t care bit.
GAIN CONTROL BYTE: MUTE
GAIN CONTROL BYTE: MUTE [7:6],
[7:6],
NOMINAL GAIN
VOLUME[5:0]
11XXXXXX
–80 dB
0010000x
–11 dB
0000000x
–59 dB
0010001x
–10 dB
0000001x
–55 dB
0010010x
–9.0 dB
0000010x
–51 dB
0010011x
–8.0 dB
0000011x
–47 dB
0010100x
–7.0 dB
0000100x
–43 dB
0010101x
–6.0 dB
0000101x
–39 dB
0010110x
–5.0dB
0000110x
–35 dB
0010111x
–4.0 dB
0000111x
–31 dB
0011000x
–3.0 dB
0001000x
–27 dB
0011001x
–2.0 dB
0001001x
–25 dB
0011010x
–1.0 dB
0001010x
–23 dB
0011011x
+0.0 dB
0001011x
–21 dB
0011100x
+1.0 dB
0001100x
–19 dB
0011101x
+2.0 dB
0001101x
–17 dB
0011110x
+3.0 dB
0001110x
–15 dB
0011111x
+4.0 dB
0001111x
–13 dB
Copyright 2009, Texas Instruments Incorporated
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