參數(shù)資料
型號(hào)： TPS24711DGSR
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： POWER SUPPLY SUPPORT CKT, PDSO10
封裝： GREEN, PLASTIC, MSOP-10
文件頁(yè)數(shù)： 13/34頁(yè)
文件大?。?/td> 2148K
代理商： TPS24711DGSR
SLVSAL2C
– JANUARY 2011 – REVISED MAY 2011
Figure 33. Latch After Overload Fault
PG, FLT, PGb, FLTb, AND TIMER OPERATIONS
The open-drain PG/PGb (PG is for TPS24712/13 and PGb is for TPS24710/11) output provides a deglitched
end-of-inrush indication based on the voltage across M1. PG/PGb is useful for preventing a downstream dc/dc
converter from starting while its input capacitor COUT is still charging. PG goes active-high and PGb goes
active-low about 3.4 ms after COUT is charged. This delay allows M1 to fully turn on and any transients in the
power circuits to end before the converter starts up. This type of sequencing prevents the downstream converter
from demanding full current before the power-limiting engine allows the MOSFET to conduct the full current set
by the current limit ILIM. Failure to observe this precaution may prevent the system from starting. The pullup
resistor shown on the PG/PGb pin in the typical application diagram on the front page is illustrative only; the
actual connection to the converter depends on the application. The PG/PGb pin may indicate that inrush has
ended before the MOSFET is fully enhanced, but the downstream capacitor will have been charged to
substantially its full operating voltage. Care should be taken to ensure that the MOSFET on-resistance is
sufficiently small to ensure that the voltage drop across this transistor is less than the minimum power-good
threshold of 140 mV. After the hot-swap circuit successfully starts up, the PG pin can return to a low-impedance
status and PGb to high-impedance status whenever the drain-to-source voltage of MOSFET M1 exceeds its
upper threshold of 340 mV, which presents the downstream converters a warning flag. This flag may occur as a
result of overload fault, output short fault, input overvoltage, higher die temperature, or the GATE shutdown by
UVLO and EN.
FLT/FLTb (FLT is for TPS24712/13 and FLTb is for TPS24710/11) is an indicator that the allowed fault-timer
period during which the load current can exceed the programmed current limit (but not the fast-trip threshold) has
expired. The fault timer starts when a current of approximately 10
μA begins to flow into the external capacitor,
CT, and ends when the voltage of CT reaches TIMER upper threshold, i.e., 1.35 V. FLT goes high and FLTb pulls
low at the end of the fault timer. Otherwise, FLT assumes a low-impedance state and FLTb a high-impedance
state.
The fault-timer state requires an external capacitor CT connected between the TIMER pin and GND pin. The
length of the fault timer is the charging time of CT from 0 V to its upper threshold of 1.35 V. The fault timer begins
to count under any of the following three conditions:
20
Copyright
2011, Texas Instruments Incorporated
Product Folder Link(s): TPS24710 TPS24711 TPS24712 TPS24713
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