
(
)
(
)
OUT max
TRIP
TRIP min
I
7 m
R
I
W
=
SLUS881A
– MAY 2009 – REVISED MAY 2011
5. Choose an RTRIP value.
Select an appropriate RTRIP value with the considerations shown in Equation 14. Maximum RTRIP should be less than 12.1 k
.
(14)
6. V5FILT input capacitor.
In order to reject high-frequency noise possibly contained on +5-V supply and V5IN voltages, apply 1-
μF of
ceramic capacitor closely at the V5FILT pin with a 10-
resistor to create a low-pass filter between +5-V
supply and the pin.
7. Applying the VBST capacitor and VBST diode.
Apply 0.1-
μF MLCC between VBST and the LL node as the flying capacitor for internal high-side FET driver.
The TPS51315 has its own on-board boost diode between V5IN and VBST. This diode is a P-N junction
diode and strong enough for most typical applications. However, if efficiency has priority over cost, the
designer may add a Schottky diode externally to improve the gate drive voltage of the high-side FET. A
Schottky diode has a higher leakage current, especially at high temperatures, than a P-N junction diode. A
low-leakage diode should be selected in order to maintain VBST voltage during low-frequency operation in
Auto-Skip mode.
Layout Considerations
Certain concepts must be considered before starting printed curcuit board (PCB) layout work using the
TPS51315.
Connect the R-C low-pass filter from the 5-V supply to the V5FILT pin. A filter resistance of 10
and a filter
capacitance of 1
μF is recommended. Place the filter capacitor close to the device, within 12 mm (0.5 inches)
if possible.
Connect the overcurrent setting resistors from TRIP to GND close to the device if possible. The trace from
TRIP to the resistor and from the resistor to GND should avoid coupling to a high-voltage switching node.
The discharge path (VOUT_DS) should have a dedicated trace to the output capacitor(s); separate from the
output voltage sensing trace, and use a 1,5 mm (60 mils) or wider trace with no loops. Make sure the
feedback current setting resistor (the resistor between VFB to GND) is tied close to the device GND. The
trace from this resistor to the VFB pin should be short and narrow. Place the trace on the component side
and avoid vias between this resistor and the device.
All sensitive analog traces and components such as VOUT, VFB, GND, EN_PSV, PGOOD, TRIP, V5FILT,
and TON should be placed away from high-voltage switching nodes such as LL or VBST to avoid coupling.
Use internal layer(s) as ground plane(s) and shield the feedback traces from power traces and components.
Gather the ground terminals of the VIN capacitor(s), VOUT capacitor(s), and the PGND as close as possible.
GND (signal ground) and PGND (power ground) should be connected strongly together near the device. The
PCB trace defined as LL node, which connects to the source of the upper MOSFET, the drain of the lower
MOSFET, and the high-voltage side of the inductor, should be as short and wide as possible.
20
Copyright
2009–2011, Texas Instruments Incorporated