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| 型號： | TPS54160DRCT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING REGULATOR, 2500 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | PLASTIC, SON-10 |
| 文件頁數(shù)： | 16/50頁 |
| 文件大?。?/td> | 1375K |
| 代理商： | TPS54160DRCT |
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www.ti.com
SLVS795C – OCTOBER 2008 – REVISED OCTOBER 2010
DETAILED DESCRIPTION (continued)
Figure 44. Plot of Synchronizing in ccm
Figure 45. Plot of Synchronizing in dcm
Figure 46. Plot of Synchronizing in PSM
Power Good (PWRGD Pin)
The PWRGD pin is an open drain output. Once the VSENSE pin is between 94% and 107% of the internal
voltage reference the PWRGD pin is de-asserted and the pin floats. It is recommended to use a pull-up resistor
between the values of 10 and 100k
to a voltage source that is 5.5V or less. The PWRGD is in a defined state
once the VIN input voltage is greater than 1.5V but with reduced current sinking capability. The PWRGD will
achieve full current sinking capability as VIN input voltage approaches 3V.
The PWRGD pin is pulled low when the VSENSE is lower than 92% or greater than 109% of the nominal internal
reference voltage. Also, the PWRGD is pulled low, if the UVLO or thermal shutdown are asserted or the EN pin
pulled low.
Copyright 2008–2010, Texas Instruments Incorporated
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Product Folder Link(s): TPS54160
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