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參數(shù)資料
| 型號(hào)： | TQ1089 |
| 廠商： | TriQuint Semiconductor,Inc. |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 連接器附件 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大?。?/td> | 193K |
| 代理商： | TQ1089 |
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For additional information and latest specifications, see our website:
www.triquint.com
TQ1089
11-Output
Configurable
Clock Buffer
Figure 1. Block Diagram
Output Buffers
VCO
Phase
Detector
VDD
Q10
Q9
GND
Q8
Q7
VDD
TEST
VDD
Q0
GND
Q1
Q2
VDD
FBIN GND REFCLK GND GND GND GND
11
10
9
8
GND Q3 Q4 VDD Q5 Q6 GND
1
2
14
13
12
7
6
5
4
3
22
21
20
19
18
17
16
15
27
28
25
24
23
26
MUX
Divide Logic
÷ 2
Group A
Group B
TriQuint’s TQ1089 is a configurable clock buffer which generates 11
outputs, operating over a wide range of frequencies from 65 MHz to 90
MHz and from 130 MHz to 180 MHz. The outputs are available at either 1x
and 2x or at 1x and
1
/
2
x the reference clock frequency, f
REF
. When one of
the Group A outputs (Q0–Q8) is used as feedback to the PLL, all Group A
outputs will be at f
REF
, and all Group B outputs (Q9, Q10) will be at 2x f
REF
. When one of the Group B outputs is used as feedback to the PLL, all
Group A outputs will be at
1
/
2
x f
REF
and all Group B outputs will be at f
REF
.
A very stable internal Phase-Locked Loop (PLL) provides low-jitter
operation. This completely self-contained PLL requires no external
capacitors or resistors. The PLL’s Voltage-Controlled Oscillator (VCO) has a
frequency range from 260 MHz to 360 MHz. By feeding back one of the
output clocks to FBIN, the PLL continuously maintains frequency and
phase synchronization between the reference clock (REFCLK) and each of
the outputs.
TriQuint’s patented output buffer design delivers a very low output-to-
output skew of 150 ps (max). The TQ1089’s symmetrical TTL outputs are
capable of sourcing and sinking 30 mA.
Features
Wide frequency range:
65 MHz to 90 MHz and
130 MHz to 180 MHz
Output configurations:
eight outputs at f
REF
two outputs at 2x f
REF
or
nine outputs at
1
/
2
x f
REF
one output at f
REF
Low output-to-output skew:
150 ps (max) within a group
Near-zero propagation delay
–350 ps + 500 ps (max) or
–350 ps +700 ps (max)
TTL–compatible with 30 mA
output drive
28–pin J–lead surface–mount
package
Ideal for PowerPC
–based
designs
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