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參數資料
| 型號： | TS68040VR33A |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Third- Generation 32-bit Microprocessor |
| 中文描述： | 32-BIT, 33 MHz, MICROPROCESSOR, CPGA179 |
| 封裝： | CERAMIC, PGA-179 |
| 文件頁數： | 19/49頁 |
| 文件大?。?/td> | 1637K |
| 代理商： | TS68040VR33A |
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19
TS68040
2116A–HIREL–09/02
Notes:
1. All testing to be performed using worst-case test conditions unless otherwise specified.
2. Maximum operating junction temperature (T
J
) = +125°. Minimum case operating temperature (T
C
) = -55°. This device is not
tested at T
C
= +125°. Testing is performed by setting the junction temperature T
J
= +125°and allowing the case and ambient
temperatures to rise and fall as necessary so as not to exceed the maximum junction temperature.
3. Capacitance is periodically sampled rather than 100% tested.
4. Power dissipation may vary in between limits depending on the application.
Dynamic Characteristics
Notes:
1. All testing to be performed using worst-case test conditions unless otherwise specified.
2. Maximum operating junction temperature (T
J
) = +125°. Minimum case operating temperature (T
C
) = -55°. This device is not
tested at T
C
= +125°. Testing is performed by setting the junction temperature T
J
= +125°and allowing the case and ambient
temperatures to rise and fall as necessary so as not to exceed the maximum junction temperature.
3. Specification value at maximum frequency of operation.
4. If not tested, shall be guaranteed to the limits specified.
V
OL
Output Low Voltage
Larger buffers - I
OL
= 35 mA
Small buffers - I
OL
= 5 mA
0.5
V
P
D
Power Dissipation (T
J
= 125°C)
Larger Buffers Enabled
Small Buffers Enabled
7.7
6.3
W
C
in
Capacitance - Note 4
V
in
= 0V, f = 1 MHz
25
pF
Table 12.
Electrical Characteristics (Continued)
-55°C
≤
T
C
≤
T
Jmax
; 4.75V
≤
V
CC
≤
5.25V unless otherwise specified
(1)(2)(3)(4)
Symbol
Characteristic
Min
Max
Unit
Table 13.
Clock AC Timing Specifications (see Figure 8)
-55°C
≤
T
C
≤
T
Jmax
; 4.75V
≤
V
CC
≤
5.25V unless otherwise specified
(1)(2)(3)(4)
Num
Characteristic
25 MHz
33 MHz
Unit
Min
Max
Min
Max
Frequency of Operation
20
25
20
33
MHz
1
PCLK Cycle Time
PCLK Rise Time
(4)
PCLK Fall Time
(4)
PCLK Duty Cycle Measured at 1.5V
(4)
PCLK Pulse Width High Measured at 1.5V
(3)(4)
PCLK Pulse Width Low Measured at 1.5V
(3)(4)
20
25
15
25
ns
2
1.7
1.7
ns
3
1.6
1.6
ns
4
47.5
52.5
46.67
53.33
%
4a
9.5
10.5
7
8
ns
4b
9.5
10.5
7
8
ns
5
BCLK Cycle Time
40
50
30
60
ns
6, 7
BCLK Rise and Fall Time
BCLK Duty Cycle Measured at 1.5V
(4)
BCLK Pulse Width High Measured at 1.5V
(4)
BCLK Pulse Width Low Measured at 1.5V
(4)
PCLK, BCLK Frequency Stability
(4)
4
3
ns
8
40
60
40
60
%
8a
16
24
12
18
ns
8b
16
24
12
18
ns
9
1000
1000
ppm
10
PCLK to BCLK Skew
9
n/a
ns
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