參數(shù)資料
型號: TS68040VR33A
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: Third- Generation 32-bit Microprocessor
中文描述: 32-BIT, 33 MHz, MICROPROCESSOR, CPGA179
封裝: CERAMIC, PGA-179
文件頁數(shù): 31/49頁
文件大?。?/td> 1637K
代理商: TS68040VR33A
31
TS68040
2116A–HIREL–09/02
For the subset of the FPU instructions that generate exception traps, the 32-bit floating-
point instruction address register (FPIAR) is loaded with the logical address of an
instruction before the instruction is executed. This address can then be used by a float-
ing-point exception handler to locate a floating-point instruction that has caused an
exception. The move floating-point data register (FMOVE) instruction (to from the
FPCR, FPSR, or FPIAR) and the move multiple data registers (FMOVEN) instruction
cannot generate floating-point exceptions; therefore, these instructions do not modify
the FPIAR. Thus, the FMOVE and FMOVEM instructions can be used to read the
FPIAR in the trap handler without changing the previous value.
Figure 20.
Programming Model
相關PDF資料
PDF描述
TS68040DESC01XCA Third- Generation 32-bit Microprocessor
TS68040DESC01YCA Third- Generation 32-bit Microprocessor
TS68040DESC02ZCA Third- Generation 32-bit Microprocessor
TS68040DESC01ZCA Third- Generation 32-bit Microprocessor
TS68040DESC02XCA Third- Generation 32-bit Microprocessor
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