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參數(shù)資料
| 型號(hào)： | TS68302VR16 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Integrated Multiprotocol Processor IMP |
| 中文描述： | 16-BIT, 16.67 MHz, RISC MICROCONTROLLER, CPGA132 |
| 封裝： | CERAMIC, PGA-132 |
| 文件頁數(shù)： | 7/47頁 |
| 文件大?。?/td> | 1149K |
| 代理商： | TS68302VR16 |
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7
TS68302
2117A–HIREL–11/02
Design and Construction
Terminal Connections
Depending on the package, the terminal connections shall be as shown in Figure 2 and
Figure 3.
Lead Material and Finish
Lead material and finish shall be any option of MIL-M-38535.
Package
The macrocircuits are packaged in hermetically sealed ceramic packages, which con-
form to case outlines of MIL-M-38535 appendix A (when defined):
132-pin Ceramic Pin Grid Array (PGA),
132-pin Ceramic Quad Flat Pack (CERQUAD).
The precise case outlines are described in Figure 2 and Figure 3.
Electrical Characteristics
Notes:
1. The values shown are typical. The typical value varies as shown, based on how many IMP on-chip peripherals are enabled
and the rate at which they are clocked.
2. LPREC = 0. Divider = 2.
3. LPREC = 1. Divider = 1024.
4. The stated frequency must be externally applied to EXTAL only after the IMP has been placed in the lowest power mode
with LPREC = 1. The 68000 core is not specified to operate at this frequency, but the rest of the IMP is. In this configuration,
the user does not divide the clock internally using the LPCD4-LPCD0 bits in the system control register.
Table 2.
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
P
D
Power Dissipation (typical at 16.67 MHz)
(1)
53
64
mA
P
D
Power Dissipation (typical at 8 MHz)
(1)
26
31
mA
LP
D
Low Power Mode Dissipation (typical at 16.67 MHz)
(2)
36
mA
LP
D
Lowest Power Mode Dissipation (typical at 16.67 MHz)
(3)
32
mA
LP
D
Lowest Power Mode Dissipation (typical at 50 MHz)
(4)
1
mA
Unless otherwise stated, all voltages are referenced to the reference terminal (see Table 1).
Table 3.
Recommended Condition of Use
Symbol
Parameter
Min
Max
Unit
V
CC
Supply Voltage
4.5
5.5
V
V
IL
Low Level Input Voltage
-0.3
+0.5
V
V
IH
High Level Input Voltage
2.4
5.5
V
T
case
Operating Temperature
-55
+125
°C
t
r
(c)
Clock Rise Time - See Figure 5
5
ns
t
f
(c)
Clock Fall Time Resistance - Figure 5
5
ns
f
c
Clock Frequency - See Figure 5
8
16.67
MHz
t
cyc
Cycle Time - See Figure 5
60
125
ns
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